da911782be
Commit db0d4db22a ('ARM: gic: allow GIC to support non-banked setups)
requires a cpu-offset property to be specified for non-banked gic
controllers, which is the case for Exynos4.
Reported-and-Tested-by: Karol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
398 lines
8.4 KiB
Text
398 lines
8.4 KiB
Text
/*
|
|
* Samsung's Exynos4210 SoC device tree source
|
|
*
|
|
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
* Copyright (c) 2010-2011 Linaro Ltd.
|
|
* www.linaro.org
|
|
*
|
|
* Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
|
|
* based board files can include this file and provide values for board specfic
|
|
* bindings.
|
|
*
|
|
* Note: This file does not include device nodes for all the controllers in
|
|
* Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
|
|
* nodes can be added to this file.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
compatible = "samsung,exynos4210";
|
|
interrupt-parent = <&gic>;
|
|
|
|
gic:interrupt-controller@10490000 {
|
|
compatible = "arm,cortex-a9-gic";
|
|
#interrupt-cells = <3>;
|
|
interrupt-controller;
|
|
cpu-offset = <0x8000>;
|
|
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
|
|
};
|
|
|
|
watchdog@10060000 {
|
|
compatible = "samsung,s3c2410-wdt";
|
|
reg = <0x10060000 0x100>;
|
|
interrupts = <0 43 0>;
|
|
};
|
|
|
|
rtc@10070000 {
|
|
compatible = "samsung,s3c6410-rtc";
|
|
reg = <0x10070000 0x100>;
|
|
interrupts = <0 44 0>, <0 45 0>;
|
|
};
|
|
|
|
keypad@100A0000 {
|
|
compatible = "samsung,s5pv210-keypad";
|
|
reg = <0x100A0000 0x100>;
|
|
interrupts = <0 109 0>;
|
|
};
|
|
|
|
sdhci@12510000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = <0x12510000 0x100>;
|
|
interrupts = <0 73 0>;
|
|
};
|
|
|
|
sdhci@12520000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = <0x12520000 0x100>;
|
|
interrupts = <0 74 0>;
|
|
};
|
|
|
|
sdhci@12530000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = <0x12530000 0x100>;
|
|
interrupts = <0 75 0>;
|
|
};
|
|
|
|
sdhci@12540000 {
|
|
compatible = "samsung,exynos4210-sdhci";
|
|
reg = <0x12540000 0x100>;
|
|
interrupts = <0 76 0>;
|
|
};
|
|
|
|
serial@13800000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = <0x13800000 0x100>;
|
|
interrupts = <0 52 0>;
|
|
};
|
|
|
|
serial@13810000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = <0x13810000 0x100>;
|
|
interrupts = <0 53 0>;
|
|
};
|
|
|
|
serial@13820000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = <0x13820000 0x100>;
|
|
interrupts = <0 54 0>;
|
|
};
|
|
|
|
serial@13830000 {
|
|
compatible = "samsung,exynos4210-uart";
|
|
reg = <0x13830000 0x100>;
|
|
interrupts = <0 55 0>;
|
|
};
|
|
|
|
i2c@13860000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13860000 0x100>;
|
|
interrupts = <0 58 0>;
|
|
};
|
|
|
|
i2c@13870000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13870000 0x100>;
|
|
interrupts = <0 59 0>;
|
|
};
|
|
|
|
i2c@13880000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13880000 0x100>;
|
|
interrupts = <0 60 0>;
|
|
};
|
|
|
|
i2c@13890000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13890000 0x100>;
|
|
interrupts = <0 61 0>;
|
|
};
|
|
|
|
i2c@138A0000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138A0000 0x100>;
|
|
interrupts = <0 62 0>;
|
|
};
|
|
|
|
i2c@138B0000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138B0000 0x100>;
|
|
interrupts = <0 63 0>;
|
|
};
|
|
|
|
i2c@138C0000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138C0000 0x100>;
|
|
interrupts = <0 64 0>;
|
|
};
|
|
|
|
i2c@138D0000 {
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138D0000 0x100>;
|
|
interrupts = <0 65 0>;
|
|
};
|
|
|
|
amba {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "arm,amba-bus";
|
|
interrupt-parent = <&gic>;
|
|
ranges;
|
|
|
|
pdma0: pdma@12680000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12680000 0x1000>;
|
|
interrupts = <0 35 0>;
|
|
};
|
|
|
|
pdma1: pdma@12690000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12690000 0x1000>;
|
|
interrupts = <0 36 0>;
|
|
};
|
|
};
|
|
|
|
gpio-controllers {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
gpio-controller;
|
|
ranges;
|
|
|
|
gpa0: gpio-controller@11400000 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400000 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpa1: gpio-controller@11400020 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400020 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpb: gpio-controller@11400040 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400040 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpc0: gpio-controller@11400060 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400060 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpc1: gpio-controller@11400080 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400080 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpd0: gpio-controller@114000A0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114000A0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpd1: gpio-controller@114000C0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114000C0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpe0: gpio-controller@114000E0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114000E0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpe1: gpio-controller@11400100 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400100 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpe2: gpio-controller@11400120 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400120 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpe3: gpio-controller@11400140 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400140 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpe4: gpio-controller@11400160 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400160 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpf0: gpio-controller@11400180 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11400180 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpf1: gpio-controller@114001A0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114001A0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpf2: gpio-controller@114001C0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114001C0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpf3: gpio-controller@114001E0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x114001E0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpj0: gpio-controller@11000000 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000000 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpj1: gpio-controller@11000020 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000020 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpk0: gpio-controller@11000040 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000040 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpk1: gpio-controller@11000060 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000060 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpk2: gpio-controller@11000080 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000080 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpk3: gpio-controller@110000A0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110000A0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpl0: gpio-controller@110000C0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110000C0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpl1: gpio-controller@110000E0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110000E0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpl2: gpio-controller@11000100 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000100 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy0: gpio-controller@11000120 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000120 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy1: gpio-controller@11000140 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000140 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy2: gpio-controller@11000160 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000160 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy3: gpio-controller@11000180 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000180 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy4: gpio-controller@110001A0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110001A0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy5: gpio-controller@110001C0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110001C0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpy6: gpio-controller@110001E0 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x110001E0 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpx0: gpio-controller@11000C00 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000C00 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpx1: gpio-controller@11000C20 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000C20 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpx2: gpio-controller@11000C40 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000C40 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpx3: gpio-controller@11000C60 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x11000C60 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
|
|
gpz: gpio-controller@03860000 {
|
|
compatible = "samsung,exynos4-gpio";
|
|
reg = <0x03860000 0x20>;
|
|
#gpio-cells = <4>;
|
|
};
|
|
};
|
|
};
|