Avi Kivity 9645bb56b3 KVM: MMU: Use different shadows when EFER.NXE changes ... A pte that is shadowed when the guest EFER.NXE=1 is not valid when EFER.NXE=0; if bit 63 is set, the pte should cause a fault, and since the shadow EFER always has NX enabled, this won't happen. Fix by using a different shadow page table for different EFER.NXE bits. This allows vcpus to run correctly with different values of EFER.NXE, and for transitions on this bit to be handled correctly without requiring a full flush. Signed-off-by: Avi Kivity <avi@redhat.com>		2009-06-10 11:48:35 +03:00
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asm	KVM: MMU: Use different shadows when EFER.NXE changes	2009-06-10 11:48:35 +03:00