0d01b7a153
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com> Tested-by: Yehuda Yitschak <yehuday@marvell.com> Tested-by: Lior Amsalem <alior@marvell.com> Acked-by: Andrew Lunn <andrew@lunn.ch>
23 lines
840 B
Text
23 lines
840 B
Text
Marvell Armada 370 and Armada XP Interrupt Controller
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Required properties:
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- compatible: Should be "marvell,mpic"
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
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The cell is the IRQ number
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- reg: Should contain PMIC registers location and length. First pair
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for the main interrupt registers, second pair for the per-CPU
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interrupt registers
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Example:
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mpic: interrupt-controller@d0020000 {
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compatible = "marvell,mpic";
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-controller;
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reg = <0xd0020000 0x1000>,
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<0xd0021000 0x1000>;
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};
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