b30fabadae
Add IRQF_IRQPOLL for each timer interrupt. Signed-off-by: Bernhard Walle <bwalle@suse.de> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
115 lines
2.4 KiB
C
115 lines
2.4 KiB
C
/*
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* linux/arch/arm/mach-imx/time.c
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*
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* Copyright (C) 2000-2001 Deep Blue Solutions
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/mach/time.h>
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/* Use timer 1 as system timer */
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#define TIMER_BASE IMX_TIM1_BASE
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static unsigned long evt_diff;
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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imx_timer_interrupt(int irq, void *dev_id)
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{
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uint32_t tstat;
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/* clear the interrupt */
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tstat = IMX_TSTAT(TIMER_BASE);
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IMX_TSTAT(TIMER_BASE) = 0;
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if (tstat & TSTAT_COMP) {
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do {
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write_seqlock(&xtime_lock);
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timer_tick();
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write_sequnlock(&xtime_lock);
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IMX_TCMP(TIMER_BASE) += evt_diff;
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} while (unlikely((int32_t)(IMX_TCMP(TIMER_BASE)
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- IMX_TCN(TIMER_BASE)) < 0));
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}
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return IRQ_HANDLED;
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}
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static struct irqaction imx_timer_irq = {
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.name = "i.MX Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = imx_timer_interrupt,
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};
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/*
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* Set up timer hardware into expected mode and state.
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*/
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static void __init imx_timer_hardware_init(void)
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{
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/*
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* Initialise to a known state (all timers off, and timing reset)
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*/
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IMX_TCTL(TIMER_BASE) = 0;
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IMX_TPRER(TIMER_BASE) = 0;
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IMX_TCMP(TIMER_BASE) = LATCH - 1;
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IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_IRQEN | TCTL_TEN;
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evt_diff = LATCH;
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}
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cycle_t imx_get_cycles(void)
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{
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return IMX_TCN(TIMER_BASE);
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}
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static struct clocksource clocksource_imx = {
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.name = "imx_timer1",
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.rating = 200,
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.read = imx_get_cycles,
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.mask = 0xFFFFFFFF,
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init imx_clocksource_init(void)
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{
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clocksource_imx.mult =
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clocksource_hz2mult(imx_get_perclk1(), clocksource_imx.shift);
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clocksource_register(&clocksource_imx);
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return 0;
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}
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static void __init imx_timer_init(void)
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{
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imx_timer_hardware_init();
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imx_clocksource_init();
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/*
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* Make irqs happen for the system timer
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*/
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setup_irq(TIM1_INT, &imx_timer_irq);
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}
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struct sys_timer imx_timer = {
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.init = imx_timer_init,
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};
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