6ebbf2ce43
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
142 lines
3 KiB
ArmAsm
142 lines
3 KiB
ArmAsm
/*
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* linux/arch/arm/lib/csumpartial.S
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*
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* Copyright (C) 1995-1998 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.text
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/*
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* Function: __u32 csum_partial(const char *src, int len, __u32 sum)
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* Params : r0 = buffer, r1 = len, r2 = checksum
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* Returns : r0 = new checksum
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*/
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buf .req r0
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len .req r1
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sum .req r2
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td0 .req r3
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td1 .req r4 @ save before use
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td2 .req r5 @ save before use
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td3 .req lr
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.Lzero: mov r0, sum
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add sp, sp, #4
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ldr pc, [sp], #4
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/*
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* Handle 0 to 7 bytes, with any alignment of source and
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* destination pointers. Note that when we get here, C = 0
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*/
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.Lless8: teq len, #0 @ check for zero count
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beq .Lzero
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/* we must have at least one byte. */
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tst buf, #1 @ odd address?
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movne sum, sum, ror #8
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ldrneb td0, [buf], #1
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subne len, len, #1
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adcnes sum, sum, td0, put_byte_1
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.Lless4: tst len, #6
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beq .Lless8_byte
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/* we are now half-word aligned */
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.Lless8_wordlp:
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#if __LINUX_ARM_ARCH__ >= 4
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ldrh td0, [buf], #2
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sub len, len, #2
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#else
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ldrb td0, [buf], #1
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ldrb td3, [buf], #1
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sub len, len, #2
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#ifndef __ARMEB__
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orr td0, td0, td3, lsl #8
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#else
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orr td0, td3, td0, lsl #8
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#endif
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#endif
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adcs sum, sum, td0
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tst len, #6
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bne .Lless8_wordlp
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.Lless8_byte: tst len, #1 @ odd number of bytes
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ldrneb td0, [buf], #1 @ include last byte
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adcnes sum, sum, td0, put_byte_0 @ update checksum
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.Ldone: adc r0, sum, #0 @ collect up the last carry
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ldr td0, [sp], #4
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tst td0, #1 @ check buffer alignment
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movne r0, r0, ror #8 @ rotate checksum by 8 bits
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ldr pc, [sp], #4 @ return
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.Lnot_aligned: tst buf, #1 @ odd address
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ldrneb td0, [buf], #1 @ make even
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subne len, len, #1
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adcnes sum, sum, td0, put_byte_1 @ update checksum
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tst buf, #2 @ 32-bit aligned?
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#if __LINUX_ARM_ARCH__ >= 4
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ldrneh td0, [buf], #2 @ make 32-bit aligned
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subne len, len, #2
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#else
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ldrneb td0, [buf], #1
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ldrneb ip, [buf], #1
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subne len, len, #2
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#ifndef __ARMEB__
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orrne td0, td0, ip, lsl #8
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#else
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orrne td0, ip, td0, lsl #8
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#endif
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#endif
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adcnes sum, sum, td0 @ update checksum
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ret lr
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ENTRY(csum_partial)
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stmfd sp!, {buf, lr}
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cmp len, #8 @ Ensure that we have at least
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blo .Lless8 @ 8 bytes to copy.
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tst buf, #1
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movne sum, sum, ror #8
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adds sum, sum, #0 @ C = 0
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tst buf, #3 @ Test destination alignment
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blne .Lnot_aligned @ align destination, return here
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1: bics ip, len, #31
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beq 3f
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stmfd sp!, {r4 - r5}
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2: ldmia buf!, {td0, td1, td2, td3}
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adcs sum, sum, td0
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adcs sum, sum, td1
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adcs sum, sum, td2
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adcs sum, sum, td3
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ldmia buf!, {td0, td1, td2, td3}
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adcs sum, sum, td0
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adcs sum, sum, td1
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adcs sum, sum, td2
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adcs sum, sum, td3
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sub ip, ip, #32
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teq ip, #0
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bne 2b
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ldmfd sp!, {r4 - r5}
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3: tst len, #0x1c @ should not change C
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beq .Lless4
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4: ldr td0, [buf], #4
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sub len, len, #4
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adcs sum, sum, td0
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tst len, #0x1c
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bne 4b
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b .Lless4
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ENDPROC(csum_partial)
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