fee3fd4fd2
When trying to kexec into a new kernel on a platform where multiple CPU
cores are present, but no SMP bringup code is available yet, the
kexec_load system call fails with:
kexec_load failed: Invalid argument
The SMP test added to machine_kexec_prepare() in commit 2103f6cba6
("ARM: 7807/1: kexec: validate CPU hotplug support") wants to prohibit
kexec on SMP platforms where it cannot disable secondary CPUs.
However, this test is too strict: if the secondary CPUs couldn't be
enabled in the first place, there's no need to disable them later at
kexec time. Hence skip the test in the absence of SMP bringup code.
This allows to add all CPU cores to the DTS from the beginning, without
having to implement SMP bringup first, improving DT compatibility.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
110 lines
2.3 KiB
C
110 lines
2.3 KiB
C
/*
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* ARM specific SMP header, this contains our implementation
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* details.
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*/
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#ifndef __ASMARM_SMP_PLAT_H
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#define __ASMARM_SMP_PLAT_H
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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/*
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* Return true if we are running on a SMP platform
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*/
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static inline bool is_smp(void)
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{
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#ifndef CONFIG_SMP
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return false;
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#elif defined(CONFIG_SMP_ON_UP)
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extern unsigned int smp_on_up;
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return !!smp_on_up;
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#else
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return true;
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#endif
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}
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/**
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* smp_cpuid_part() - return part id for a given cpu
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* @cpu: logical cpu id.
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*
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* Return: part id of logical cpu passed as argument.
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*/
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static inline unsigned int smp_cpuid_part(int cpu)
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{
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struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
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return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
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read_cpuid_part();
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}
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/* all SMP configurations have the extended CPUID registers */
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#ifndef CONFIG_MMU
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#define tlb_ops_need_broadcast() 0
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#else
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static inline int tlb_ops_need_broadcast(void)
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{
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if (!is_smp())
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return 0;
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
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}
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#endif
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#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
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#define cache_ops_need_broadcast() 0
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#else
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static inline int cache_ops_need_broadcast(void)
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{
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if (!is_smp())
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return 0;
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
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}
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#endif
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/*
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* Logical CPU mapping.
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*/
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extern u32 __cpu_logical_map[];
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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/*
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* Retrieve logical cpu index corresponding to a given MPIDR[23:0]
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* - mpidr: MPIDR[23:0] to be used for the look-up
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*
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* Returns the cpu logical index or -EINVAL on look-up error
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*/
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static inline int get_logical_index(u32 mpidr)
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{
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int cpu;
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for (cpu = 0; cpu < nr_cpu_ids; cpu++)
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if (cpu_logical_map(cpu) == mpidr)
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return cpu;
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return -EINVAL;
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}
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/*
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* NOTE ! Assembly code relies on the following
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* structure memory layout in order to carry out load
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* multiple from its base address. For more
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* information check arch/arm/kernel/sleep.S
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*/
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struct mpidr_hash {
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u32 mask; /* used by sleep.S */
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u32 shift_aff[3]; /* used by sleep.S */
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u32 bits;
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};
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extern struct mpidr_hash mpidr_hash;
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static inline u32 mpidr_hash_size(void)
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{
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return 1 << mpidr_hash.bits;
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}
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extern int platform_can_secondary_boot(void);
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extern int platform_can_cpu_hotplug(void);
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#endif
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