7517de3486
- Rewrite Alchemy PCI support as a platform driver. - Fixup boards which have PCI. Run-tested on DB1500 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/pci.c delete mode 100644 arch/mips/pci/fixup-au1000.c delete mode 100644 arch/mips/pci/ops-au1000.c create mode 100644 arch/mips/pci/pci-alchemy.c
230 lines
4.9 KiB
C
230 lines
4.9 KiB
C
/*
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* GPR board platform device registration
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*
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* Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <asm/mach-au1x00/au1000.h>
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/*
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* Watchdog
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*/
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static struct resource gpr_wdt_resource[] = {
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[0] = {
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.start = 1,
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.end = 1,
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.name = "gpr-adm6320-wdt",
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device gpr_wdt_device = {
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.name = "adm6320-wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(gpr_wdt_resource),
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.resource = gpr_wdt_resource,
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};
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/*
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* FLASH
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*
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* 0x00000000-0x00200000 : "kernel"
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* 0x00200000-0x00a00000 : "rootfs"
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* 0x01d00000-0x01f00000 : "config"
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* 0x01c00000-0x01d00000 : "yamon"
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* 0x01d00000-0x01d40000 : "yamon env vars"
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* 0x00000000-0x00a00000 : "kernel+rootfs"
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*/
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static struct mtd_partition gpr_mtd_partitions[] = {
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{
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.name = "kernel",
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.size = 0x00200000,
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.offset = 0,
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},
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{
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.name = "rootfs",
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.size = 0x00800000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "config",
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.size = 0x00200000,
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.offset = 0x01d00000,
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},
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{
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.name = "yamon",
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.size = 0x00100000,
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.offset = 0x01c00000,
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},
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{
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.name = "yamon env vars",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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},
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{
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.name = "kernel+rootfs",
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.size = 0x00a00000,
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.offset = 0,
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},
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};
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static struct physmap_flash_data gpr_flash_data = {
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.width = 4,
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.nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
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.parts = gpr_mtd_partitions,
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};
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static struct resource gpr_mtd_resource = {
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.start = 0x1e000000,
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.end = 0x1fffffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device gpr_mtd_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &gpr_flash_data,
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},
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.num_resources = 1,
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.resource = &gpr_mtd_resource,
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};
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/*
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* LEDs
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*/
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static struct gpio_led gpr_gpio_leds[] = {
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{ /* green */
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.name = "gpr:green",
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.gpio = 4,
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.active_low = 1,
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},
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{ /* red */
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.name = "gpr:red",
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.gpio = 5,
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.active_low = 1,
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}
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};
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static struct gpio_led_platform_data gpr_led_data = {
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.num_leds = ARRAY_SIZE(gpr_gpio_leds),
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.leds = gpr_gpio_leds,
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};
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static struct platform_device gpr_led_devices = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &gpr_led_data,
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}
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};
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/*
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* I2C
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*/
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static struct i2c_gpio_platform_data gpr_i2c_data = {
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.sda_pin = 209,
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.sda_is_open_drain = 1,
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.scl_pin = 210,
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.scl_is_open_drain = 1,
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.udelay = 2, /* ~100 kHz */
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.timeout = HZ,
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};
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static struct platform_device gpr_i2c_device = {
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.name = "i2c-gpio",
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.id = -1,
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.dev.platform_data = &gpr_i2c_data,
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};
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static struct i2c_board_info gpr_i2c_info[] __initdata = {
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{
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I2C_BOARD_INFO("lm83", 0x18),
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.type = "lm83"
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}
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};
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static struct resource alchemy_pci_host_res[] = {
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[0] = {
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.start = AU1500_PCI_PHYS_ADDR,
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.end = AU1500_PCI_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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};
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static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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if ((slot == 0) && (pin == 1))
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return AU1550_PCI_INTA;
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else if ((slot == 0) && (pin == 2))
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return AU1550_PCI_INTB;
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return -1;
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}
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static struct alchemy_pci_platdata gpr_pci_pd = {
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.board_map_irq = gpr_map_pci_irq,
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.pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
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PCI_CONFIG_CH |
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#if defined(__MIPSEB__)
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PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
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#else
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0,
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#endif
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};
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static struct platform_device gpr_pci_host_dev = {
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.dev.platform_data = &gpr_pci_pd,
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.name = "alchemy-pci",
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.id = 0,
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.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
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.resource = alchemy_pci_host_res,
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};
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static struct platform_device *gpr_devices[] __initdata = {
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&gpr_wdt_device,
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&gpr_mtd_device,
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&gpr_i2c_device,
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&gpr_led_devices,
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};
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static int __init gpr_pci_init(void)
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{
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return platform_device_register(&gpr_pci_host_dev);
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}
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/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
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arch_initcall(gpr_pci_init);
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static int __init gpr_dev_init(void)
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{
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i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
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return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
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}
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device_initcall(gpr_dev_init);
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