91da11f870
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Tim Ellis <tim.ellis@mac.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
77 lines
2.2 KiB
C
77 lines
2.2 KiB
C
/*
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* net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __MV88E6XXX_H
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#define __MV88E6XXX_H
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#define REG_PORT(p) (0x10 + (p))
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#define REG_GLOBAL 0x1b
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#define REG_GLOBAL2 0x1c
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struct mv88e6xxx_priv_state {
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/*
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* When using multi-chip addressing, this mutex protects
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* access to the indirect access registers. (In single-chip
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* mode, this mutex is effectively useless.)
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*/
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struct mutex smi_mutex;
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/*
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* This mutex serialises access to the statistics unit.
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* Hold this mutex over snapshot + dump sequences.
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*/
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struct mutex stats_mutex;
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};
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struct mv88e6xxx_hw_stat {
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char string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int reg;
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};
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int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
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int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
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int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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int reg, u16 val);
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int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
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int mv88e6xxx_config_prio(struct dsa_switch *ds);
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int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
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int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
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void mv88e6xxx_poll_link(struct dsa_switch *ds);
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void mv88e6xxx_get_strings(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint8_t *data);
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void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint64_t *data);
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#define REG_READ(addr, reg) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_read(ds, addr, reg); \
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if (__ret < 0) \
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return __ret; \
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__ret; \
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})
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#define REG_WRITE(addr, reg, val) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
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if (__ret < 0) \
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return __ret; \
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})
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#endif
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