d5e9fb31ba
The A80 has a rather usual pin controller, the only thing out of the ordinary being that it has 5 interrupts banks, and that some pins have several options for the same functions. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 lines
587 B
Makefile
13 lines
587 B
Makefile
# Core
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obj-$(CONFIG_PINCTRL_SUNXI_COMMON) += pinctrl-sunxi.o
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# SoC Drivers
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obj-$(CONFIG_PINCTRL_SUN4I_A10) += pinctrl-sun4i-a10.o
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obj-$(CONFIG_PINCTRL_SUN5I_A10S) += pinctrl-sun5i-a10s.o
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obj-$(CONFIG_PINCTRL_SUN5I_A13) += pinctrl-sun5i-a13.o
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obj-$(CONFIG_PINCTRL_SUN6I_A31) += pinctrl-sun6i-a31.o
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obj-$(CONFIG_PINCTRL_SUN6I_A31_R) += pinctrl-sun6i-a31-r.o
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obj-$(CONFIG_PINCTRL_SUN7I_A20) += pinctrl-sun7i-a20.o
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obj-$(CONFIG_PINCTRL_SUN8I_A23) += pinctrl-sun8i-a23.o
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obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o
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obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o
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