6903591f31
The IRQ core code will take care of disabling and reenabling interrupts over suspend resume automatically, therefore we do not need to do this in the Xen event channel code. The only exception is those event channels marked IRQF_NO_SUSPEND which the IRQ core ignores. We must unmask these ourselves, taking care to obey the current IRQ_DISABLED status. Failure check for IRQ_DISABLED leads to enabling polled only event channels, such as that associated with the pv spinlocks, which must never be enabled: [ 21.970432] ------------[ cut here ]------------ [ 21.970432] kernel BUG at arch/x86/xen/spinlock.c:343! [ 21.970432] invalid opcode: 0000 [#1] SMP [ 21.970432] last sysfs file: /sys/devices/virtual/net/lo/operstate [ 21.970432] Modules linked in: [ 21.970432] [ 21.970432] Pid: 0, comm: swapper Not tainted (2.6.32.24-x86_32p-xen-01034-g787c727 #34) [ 21.970432] EIP: 0061:[<c102e209>] EFLAGS: 00010046 CPU: 3 [ 21.970432] EIP is at dummy_handler+0x3/0x7 [ 21.970432] EAX: 0000021c EBX: dfc16880 ECX: 0000001a EDX: 00000000 [ 21.970432] ESI: dfc02c00 EDI: 00000001 EBP: dfc47e10 ESP: dfc47e10 [ 21.970432] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0069 [ 21.970432] Process swapper (pid: 0, ti=dfc46000 task=dfc39440 task.ti=dfc46000) [ 21.970432] Stack: [ 21.970432] dfc47e30 c10a39f0 0000021c 00000000 00000000 dfc16880 0000021c 00000001 [ 21.970432] <0> dfc47e40 c10a4f08 0000021c 00000000 dfc47e78 c12240a7 c1839284 c1839284 [ 21.970432] <0> 00000200 00000000 00000000 f5720000 c1f3d028 c1f3d02c 00000180 dfc47e90 [ 21.970432] Call Trace: [ 21.970432] [<c10a39f0>] ? handle_IRQ_event+0x5f/0x122 [ 21.970432] [<c10a4f08>] ? handle_percpu_irq+0x2f/0x55 [ 21.970432] [<c12240a7>] ? __xen_evtchn_do_upcall+0xdb/0x15f [ 21.970432] [<c122481e>] ? xen_evtchn_do_upcall+0x20/0x30 [ 21.970432] [<c1030d47>] ? xen_do_upcall+0x7/0xc [ 21.970432] [<c102007b>] ? apic_reg_read+0xd3/0x22d [ 21.970432] [<c1002227>] ? hypercall_page+0x227/0x1005 [ 21.970432] [<c102d30b>] ? xen_force_evtchn_callback+0xf/0x14 [ 21.970432] [<c102da7c>] ? check_events+0x8/0xc [ 21.970432] [<c102da3b>] ? xen_irq_enable_direct_end+0x0/0x1 [ 21.970432] [<c105e485>] ? finish_task_switch+0x62/0xba [ 21.970432] [<c14e3f84>] ? schedule+0x808/0x89d [ 21.970432] [<c1084dc5>] ? hrtimer_start_expires+0x1a/0x22 [ 21.970432] [<c1085154>] ? tick_nohz_restart_sched_tick+0x15a/0x162 [ 21.970432] [<c102f43a>] ? cpu_idle+0x6d/0x6f [ 21.970432] [<c14db29e>] ? cpu_bringup_and_idle+0xd/0xf [ 21.970432] Code: 5d 0f 95 c0 0f b6 c0 c3 55 66 83 78 02 00 89 e5 5d 0f 95 \ c0 0f b6 c0 c3 55 b2 01 86 10 31 c0 84 d2 89 e5 0f 94 c0 5d c3 55 89 e5 <0f> 0b \ eb fe 55 80 3d 4c ce 84 c1 00 89 e5 57 56 89 c6 53 74 15 [ 21.970432] EIP: [<c102e209>] dummy_handler+0x3/0x7 SS:ESP 0069:dfc47e10 [ 21.970432] ---[ end trace c0b71f7e12cf3011 ]--- Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
1550 lines
35 KiB
C
1550 lines
35 KiB
C
/*
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* Xen event channels
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*
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* Xen models interrupts with abstract event channels. Because each
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* domain gets 1024 event channels, but NR_IRQ is not that large, we
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* must dynamically map irqs<->event channels. The event channels
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* interface with the rest of the kernel by defining a xen interrupt
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* chip. When an event is recieved, it is mapped to an irq and sent
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* through the normal interrupt processing path.
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*
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* There are four kinds of events which can be mapped to an event
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* channel:
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*
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* 1. Inter-domain notifications. This includes all the virtual
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* device events, since they're driven by front-ends in another domain
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* (typically dom0).
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* 2. VIRQs, typically used for timers. These are per-cpu events.
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* 3. IPIs.
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* 4. PIRQs - Hardware interrupts.
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*
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* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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*/
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#include <linux/linkage.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/slab.h>
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#include <linux/irqnr.h>
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#include <linux/pci.h>
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#include <asm/desc.h>
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#include <asm/ptrace.h>
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#include <asm/irq.h>
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#include <asm/idle.h>
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#include <asm/io_apic.h>
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#include <asm/sync_bitops.h>
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#include <asm/xen/pci.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include <xen/xen.h>
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#include <xen/hvm.h>
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#include <xen/xen-ops.h>
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#include <xen/events.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/event_channel.h>
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#include <xen/interface/hvm/hvm_op.h>
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#include <xen/interface/hvm/params.h>
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/*
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* This lock protects updates to the following mapping and reference-count
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* arrays. The lock does not need to be acquired to read the mapping tables.
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*/
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static DEFINE_SPINLOCK(irq_mapping_update_lock);
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/* IRQ <-> VIRQ mapping. */
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static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
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/* IRQ <-> IPI mapping */
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static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
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/* Interrupt types. */
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enum xen_irq_type {
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IRQT_UNBOUND = 0,
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IRQT_PIRQ,
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IRQT_VIRQ,
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IRQT_IPI,
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IRQT_EVTCHN
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};
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/*
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* Packed IRQ information:
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* type - enum xen_irq_type
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* event channel - irq->event channel mapping
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* cpu - cpu this event channel is bound to
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* index - type-specific information:
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* PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
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* guest, or GSI (real passthrough IRQ) of the device.
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* VIRQ - virq number
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* IPI - IPI vector
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* EVTCHN -
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*/
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struct irq_info
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{
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enum xen_irq_type type; /* type */
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unsigned short evtchn; /* event channel */
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unsigned short cpu; /* cpu bound */
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union {
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unsigned short virq;
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enum ipi_vector ipi;
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struct {
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unsigned short pirq;
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unsigned short gsi;
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unsigned char vector;
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unsigned char flags;
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} pirq;
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} u;
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};
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#define PIRQ_NEEDS_EOI (1 << 0)
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#define PIRQ_SHAREABLE (1 << 1)
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static struct irq_info *irq_info;
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static int *pirq_to_irq;
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static int nr_pirqs;
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static int *evtchn_to_irq;
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struct cpu_evtchn_s {
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unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
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};
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static __initdata struct cpu_evtchn_s init_evtchn_mask = {
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.bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
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};
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static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
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static inline unsigned long *cpu_evtchn_mask(int cpu)
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{
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return cpu_evtchn_mask_p[cpu].bits;
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}
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/* Xen will never allocate port zero for any purpose. */
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#define VALID_EVTCHN(chn) ((chn) != 0)
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static struct irq_chip xen_dynamic_chip;
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static struct irq_chip xen_percpu_chip;
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static struct irq_chip xen_pirq_chip;
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/* Constructor for packed IRQ information. */
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static struct irq_info mk_unbound_info(void)
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{
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return (struct irq_info) { .type = IRQT_UNBOUND };
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}
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static struct irq_info mk_evtchn_info(unsigned short evtchn)
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{
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return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
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.cpu = 0 };
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}
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static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
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{
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return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
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.cpu = 0, .u.ipi = ipi };
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}
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static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
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{
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return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
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.cpu = 0, .u.virq = virq };
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}
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static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
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unsigned short gsi, unsigned short vector)
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{
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return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
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.cpu = 0,
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.u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
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}
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/*
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* Accessors for packed IRQ information.
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*/
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static struct irq_info *info_for_irq(unsigned irq)
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{
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return &irq_info[irq];
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}
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static unsigned int evtchn_from_irq(unsigned irq)
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{
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return info_for_irq(irq)->evtchn;
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}
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unsigned irq_from_evtchn(unsigned int evtchn)
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{
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return evtchn_to_irq[evtchn];
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}
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EXPORT_SYMBOL_GPL(irq_from_evtchn);
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static enum ipi_vector ipi_from_irq(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info == NULL);
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BUG_ON(info->type != IRQT_IPI);
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return info->u.ipi;
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}
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static unsigned virq_from_irq(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info == NULL);
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BUG_ON(info->type != IRQT_VIRQ);
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return info->u.virq;
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}
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static unsigned pirq_from_irq(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info == NULL);
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BUG_ON(info->type != IRQT_PIRQ);
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return info->u.pirq.pirq;
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}
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static unsigned gsi_from_irq(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info == NULL);
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BUG_ON(info->type != IRQT_PIRQ);
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return info->u.pirq.gsi;
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}
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static unsigned vector_from_irq(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info == NULL);
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BUG_ON(info->type != IRQT_PIRQ);
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return info->u.pirq.vector;
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}
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static enum xen_irq_type type_from_irq(unsigned irq)
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{
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return info_for_irq(irq)->type;
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}
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static unsigned cpu_from_irq(unsigned irq)
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{
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return info_for_irq(irq)->cpu;
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}
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static unsigned int cpu_from_evtchn(unsigned int evtchn)
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{
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int irq = evtchn_to_irq[evtchn];
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unsigned ret = 0;
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if (irq != -1)
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ret = cpu_from_irq(irq);
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return ret;
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}
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static bool pirq_needs_eoi(unsigned irq)
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{
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struct irq_info *info = info_for_irq(irq);
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BUG_ON(info->type != IRQT_PIRQ);
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return info->u.pirq.flags & PIRQ_NEEDS_EOI;
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}
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static inline unsigned long active_evtchns(unsigned int cpu,
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struct shared_info *sh,
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unsigned int idx)
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{
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return (sh->evtchn_pending[idx] &
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cpu_evtchn_mask(cpu)[idx] &
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~sh->evtchn_mask[idx]);
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}
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static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
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{
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int irq = evtchn_to_irq[chn];
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BUG_ON(irq == -1);
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#ifdef CONFIG_SMP
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cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
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#endif
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__clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
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__set_bit(chn, cpu_evtchn_mask(cpu));
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irq_info[irq].cpu = cpu;
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}
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static void init_evtchn_cpu_bindings(void)
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{
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#ifdef CONFIG_SMP
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struct irq_desc *desc;
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int i;
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/* By default all event channels notify CPU#0. */
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for_each_irq_desc(i, desc) {
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cpumask_copy(desc->affinity, cpumask_of(0));
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}
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#endif
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memset(cpu_evtchn_mask(0), ~0, sizeof(struct cpu_evtchn_s));
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}
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static inline void clear_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_clear_bit(port, &s->evtchn_pending[0]);
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}
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static inline void set_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, &s->evtchn_pending[0]);
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}
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static inline int test_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_bit(port, &s->evtchn_pending[0]);
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}
|
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|
|
|
|
/**
|
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* notify_remote_via_irq - send event to remote end of event channel via irq
|
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* @irq: irq of event channel to send event to
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|
*
|
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* Unlike notify_remote_via_evtchn(), this is safe to use across
|
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* save/restore. Notifications on a broken connection are silently
|
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* dropped.
|
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*/
|
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void notify_remote_via_irq(int irq)
|
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{
|
|
int evtchn = evtchn_from_irq(irq);
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|
|
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if (VALID_EVTCHN(evtchn))
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notify_remote_via_evtchn(evtchn);
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}
|
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EXPORT_SYMBOL_GPL(notify_remote_via_irq);
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|
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static void mask_evtchn(int port)
|
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{
|
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struct shared_info *s = HYPERVISOR_shared_info;
|
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sync_set_bit(port, &s->evtchn_mask[0]);
|
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}
|
|
|
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static void unmask_evtchn(int port)
|
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{
|
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struct shared_info *s = HYPERVISOR_shared_info;
|
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unsigned int cpu = get_cpu();
|
|
|
|
BUG_ON(!irqs_disabled());
|
|
|
|
/* Slow path (hypercall) if this is a non-local port. */
|
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if (unlikely(cpu != cpu_from_evtchn(port))) {
|
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struct evtchn_unmask unmask = { .port = port };
|
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(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
|
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} else {
|
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struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
|
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|
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sync_clear_bit(port, &s->evtchn_mask[0]);
|
|
|
|
/*
|
|
* The following is basically the equivalent of
|
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* 'hw_resend_irq'. Just like a real IO-APIC we 'lose
|
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* the interrupt edge' if the channel is masked.
|
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*/
|
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if (sync_test_bit(port, &s->evtchn_pending[0]) &&
|
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!sync_test_and_set_bit(port / BITS_PER_LONG,
|
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&vcpu_info->evtchn_pending_sel))
|
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vcpu_info->evtchn_upcall_pending = 1;
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}
|
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|
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put_cpu();
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}
|
|
|
|
static int get_nr_hw_irqs(void)
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{
|
|
int ret = 1;
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|
|
|
#ifdef CONFIG_X86_IO_APIC
|
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ret = get_nr_irqs_gsi();
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#endif
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|
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return ret;
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}
|
|
|
|
/* callers of this function should make sure that PHYSDEVOP_get_nr_pirqs
|
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* succeeded otherwise nr_pirqs won't hold the right value */
|
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static int find_unbound_pirq(void)
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{
|
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int i;
|
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for (i = nr_pirqs-1; i >= 0; i--) {
|
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if (pirq_to_irq[i] < 0)
|
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return i;
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}
|
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return -1;
|
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}
|
|
|
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static int find_unbound_irq(void)
|
|
{
|
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struct irq_data *data;
|
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int irq, res;
|
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int start = get_nr_hw_irqs();
|
|
|
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if (start == nr_irqs)
|
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goto no_irqs;
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|
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/* nr_irqs is a magic value. Must not use it.*/
|
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for (irq = nr_irqs-1; irq > start; irq--) {
|
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data = irq_get_irq_data(irq);
|
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/* only 0->15 have init'd desc; handle irq > 16 */
|
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if (!data)
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break;
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if (data->chip == &no_irq_chip)
|
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break;
|
|
if (data->chip != &xen_dynamic_chip)
|
|
continue;
|
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if (irq_info[irq].type == IRQT_UNBOUND)
|
|
return irq;
|
|
}
|
|
|
|
if (irq == start)
|
|
goto no_irqs;
|
|
|
|
res = irq_alloc_desc_at(irq, 0);
|
|
|
|
if (WARN_ON(res != irq))
|
|
return -1;
|
|
|
|
return irq;
|
|
|
|
no_irqs:
|
|
panic("No available IRQ to bind to: increase nr_irqs!\n");
|
|
}
|
|
|
|
static bool identity_mapped_irq(unsigned irq)
|
|
{
|
|
/* identity map all the hardware irqs */
|
|
return irq < get_nr_hw_irqs();
|
|
}
|
|
|
|
static void pirq_unmask_notify(int irq)
|
|
{
|
|
struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
|
|
|
|
if (unlikely(pirq_needs_eoi(irq))) {
|
|
int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
|
|
WARN_ON(rc);
|
|
}
|
|
}
|
|
|
|
static void pirq_query_unmask(int irq)
|
|
{
|
|
struct physdev_irq_status_query irq_status;
|
|
struct irq_info *info = info_for_irq(irq);
|
|
|
|
BUG_ON(info->type != IRQT_PIRQ);
|
|
|
|
irq_status.irq = pirq_from_irq(irq);
|
|
if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
|
|
irq_status.flags = 0;
|
|
|
|
info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
|
|
if (irq_status.flags & XENIRQSTAT_needs_eoi)
|
|
info->u.pirq.flags |= PIRQ_NEEDS_EOI;
|
|
}
|
|
|
|
static bool probing_irq(int irq)
|
|
{
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
return desc && desc->action == NULL;
|
|
}
|
|
|
|
static unsigned int startup_pirq(unsigned int irq)
|
|
{
|
|
struct evtchn_bind_pirq bind_pirq;
|
|
struct irq_info *info = info_for_irq(irq);
|
|
int evtchn = evtchn_from_irq(irq);
|
|
int rc;
|
|
|
|
BUG_ON(info->type != IRQT_PIRQ);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
goto out;
|
|
|
|
bind_pirq.pirq = pirq_from_irq(irq);
|
|
/* NB. We are happy to share unless we are probing. */
|
|
bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
|
|
BIND_PIRQ__WILL_SHARE : 0;
|
|
rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
|
|
if (rc != 0) {
|
|
if (!probing_irq(irq))
|
|
printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
|
|
irq);
|
|
return 0;
|
|
}
|
|
evtchn = bind_pirq.port;
|
|
|
|
pirq_query_unmask(irq);
|
|
|
|
evtchn_to_irq[evtchn] = irq;
|
|
bind_evtchn_to_cpu(evtchn, 0);
|
|
info->evtchn = evtchn;
|
|
|
|
out:
|
|
unmask_evtchn(evtchn);
|
|
pirq_unmask_notify(irq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void shutdown_pirq(unsigned int irq)
|
|
{
|
|
struct evtchn_close close;
|
|
struct irq_info *info = info_for_irq(irq);
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
BUG_ON(info->type != IRQT_PIRQ);
|
|
|
|
if (!VALID_EVTCHN(evtchn))
|
|
return;
|
|
|
|
mask_evtchn(evtchn);
|
|
|
|
close.port = evtchn;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
|
|
BUG();
|
|
|
|
bind_evtchn_to_cpu(evtchn, 0);
|
|
evtchn_to_irq[evtchn] = -1;
|
|
info->evtchn = 0;
|
|
}
|
|
|
|
static void enable_pirq(unsigned int irq)
|
|
{
|
|
startup_pirq(irq);
|
|
}
|
|
|
|
static void disable_pirq(unsigned int irq)
|
|
{
|
|
}
|
|
|
|
static void ack_pirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
move_native_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn)) {
|
|
mask_evtchn(evtchn);
|
|
clear_evtchn(evtchn);
|
|
}
|
|
}
|
|
|
|
static void end_pirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
struct irq_desc *desc = irq_to_desc(irq);
|
|
|
|
if (WARN_ON(!desc))
|
|
return;
|
|
|
|
if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
|
|
(IRQ_DISABLED|IRQ_PENDING)) {
|
|
shutdown_pirq(irq);
|
|
} else if (VALID_EVTCHN(evtchn)) {
|
|
unmask_evtchn(evtchn);
|
|
pirq_unmask_notify(irq);
|
|
}
|
|
}
|
|
|
|
static int find_irq_by_gsi(unsigned gsi)
|
|
{
|
|
int irq;
|
|
|
|
for (irq = 0; irq < nr_irqs; irq++) {
|
|
struct irq_info *info = info_for_irq(irq);
|
|
|
|
if (info == NULL || info->type != IRQT_PIRQ)
|
|
continue;
|
|
|
|
if (gsi_from_irq(irq) == gsi)
|
|
return irq;
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
|
|
{
|
|
return xen_map_pirq_gsi(gsi, gsi, shareable, name);
|
|
}
|
|
|
|
/* xen_map_pirq_gsi might allocate irqs from the top down, as a
|
|
* consequence don't assume that the irq number returned has a low value
|
|
* or can be used as a pirq number unless you know otherwise.
|
|
*
|
|
* One notable exception is when xen_map_pirq_gsi is called passing an
|
|
* hardware gsi as argument, in that case the irq number returned
|
|
* matches the gsi number passed as second argument.
|
|
*
|
|
* Note: We don't assign an event channel until the irq actually started
|
|
* up. Return an existing irq if we've already got one for the gsi.
|
|
*/
|
|
int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
|
|
{
|
|
int irq = 0;
|
|
struct physdev_irq irq_op;
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
if ((pirq > nr_pirqs) || (gsi > nr_irqs)) {
|
|
printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
|
|
pirq > nr_pirqs ? "nr_pirqs" :"",
|
|
gsi > nr_irqs ? "nr_irqs" : "");
|
|
goto out;
|
|
}
|
|
|
|
irq = find_irq_by_gsi(gsi);
|
|
if (irq != -1) {
|
|
printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
|
|
irq, gsi);
|
|
goto out; /* XXX need refcount? */
|
|
}
|
|
|
|
/* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
|
|
* we are using the !xen_initial_domain() to drop in the function.*/
|
|
if (identity_mapped_irq(gsi) || (!xen_initial_domain() &&
|
|
xen_pv_domain())) {
|
|
irq = gsi;
|
|
irq_alloc_desc_at(irq, 0);
|
|
} else
|
|
irq = find_unbound_irq();
|
|
|
|
set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
|
|
handle_level_irq, name);
|
|
|
|
irq_op.irq = irq;
|
|
irq_op.vector = 0;
|
|
|
|
/* Only the privileged domain can do this. For non-priv, the pcifront
|
|
* driver provides a PCI bus that does the call to do exactly
|
|
* this in the priv domain. */
|
|
if (xen_initial_domain() &&
|
|
HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
|
|
irq_free_desc(irq);
|
|
irq = -ENOSPC;
|
|
goto out;
|
|
}
|
|
|
|
irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
|
|
irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
|
|
pirq_to_irq[pirq] = irq;
|
|
|
|
out:
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
|
|
return irq;
|
|
}
|
|
|
|
#ifdef CONFIG_PCI_MSI
|
|
#include <linux/msi.h>
|
|
#include "../pci/msi.h"
|
|
|
|
void xen_allocate_pirq_msi(char *name, int *irq, int *pirq)
|
|
{
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
*irq = find_unbound_irq();
|
|
if (*irq == -1)
|
|
goto out;
|
|
|
|
*pirq = find_unbound_pirq();
|
|
if (*pirq == -1)
|
|
goto out;
|
|
|
|
set_irq_chip_and_handler_name(*irq, &xen_pirq_chip,
|
|
handle_level_irq, name);
|
|
|
|
irq_info[*irq] = mk_pirq_info(0, *pirq, 0, 0);
|
|
pirq_to_irq[*pirq] = *irq;
|
|
|
|
out:
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
}
|
|
|
|
int xen_create_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int type)
|
|
{
|
|
int irq = -1;
|
|
struct physdev_map_pirq map_irq;
|
|
int rc;
|
|
int pos;
|
|
u32 table_offset, bir;
|
|
|
|
memset(&map_irq, 0, sizeof(map_irq));
|
|
map_irq.domid = DOMID_SELF;
|
|
map_irq.type = MAP_PIRQ_TYPE_MSI;
|
|
map_irq.index = -1;
|
|
map_irq.pirq = -1;
|
|
map_irq.bus = dev->bus->number;
|
|
map_irq.devfn = dev->devfn;
|
|
|
|
if (type == PCI_CAP_ID_MSIX) {
|
|
pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
|
|
|
|
pci_read_config_dword(dev, msix_table_offset_reg(pos),
|
|
&table_offset);
|
|
bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
|
|
|
|
map_irq.table_base = pci_resource_start(dev, bir);
|
|
map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
|
|
}
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
irq = find_unbound_irq();
|
|
|
|
if (irq == -1)
|
|
goto out;
|
|
|
|
rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
|
|
if (rc) {
|
|
printk(KERN_WARNING "xen map irq failed %d\n", rc);
|
|
|
|
irq_free_desc(irq);
|
|
|
|
irq = -1;
|
|
goto out;
|
|
}
|
|
irq_info[irq] = mk_pirq_info(0, map_irq.pirq, 0, map_irq.index);
|
|
|
|
set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
|
|
handle_level_irq,
|
|
(type == PCI_CAP_ID_MSIX) ? "msi-x":"msi");
|
|
|
|
out:
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
return irq;
|
|
}
|
|
#endif
|
|
|
|
int xen_destroy_irq(int irq)
|
|
{
|
|
struct irq_desc *desc;
|
|
struct physdev_unmap_pirq unmap_irq;
|
|
struct irq_info *info = info_for_irq(irq);
|
|
int rc = -ENOENT;
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
desc = irq_to_desc(irq);
|
|
if (!desc)
|
|
goto out;
|
|
|
|
if (xen_initial_domain()) {
|
|
unmap_irq.pirq = info->u.pirq.gsi;
|
|
unmap_irq.domid = DOMID_SELF;
|
|
rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
|
|
if (rc) {
|
|
printk(KERN_WARNING "unmap irq failed %d\n", rc);
|
|
goto out;
|
|
}
|
|
}
|
|
irq_info[irq] = mk_unbound_info();
|
|
|
|
irq_free_desc(irq);
|
|
|
|
out:
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
return rc;
|
|
}
|
|
|
|
int xen_vector_from_irq(unsigned irq)
|
|
{
|
|
return vector_from_irq(irq);
|
|
}
|
|
|
|
int xen_gsi_from_irq(unsigned irq)
|
|
{
|
|
return gsi_from_irq(irq);
|
|
}
|
|
|
|
int bind_evtchn_to_irq(unsigned int evtchn)
|
|
{
|
|
int irq;
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
irq = evtchn_to_irq[evtchn];
|
|
|
|
if (irq == -1) {
|
|
irq = find_unbound_irq();
|
|
|
|
set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
|
|
handle_fasteoi_irq, "event");
|
|
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_evtchn_info(evtchn);
|
|
}
|
|
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
|
|
return irq;
|
|
}
|
|
EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
|
|
|
|
static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
|
|
{
|
|
struct evtchn_bind_ipi bind_ipi;
|
|
int evtchn, irq;
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
irq = per_cpu(ipi_to_irq, cpu)[ipi];
|
|
|
|
if (irq == -1) {
|
|
irq = find_unbound_irq();
|
|
if (irq < 0)
|
|
goto out;
|
|
|
|
set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
|
|
handle_percpu_irq, "ipi");
|
|
|
|
bind_ipi.vcpu = cpu;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
|
|
&bind_ipi) != 0)
|
|
BUG();
|
|
evtchn = bind_ipi.port;
|
|
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_ipi_info(evtchn, ipi);
|
|
per_cpu(ipi_to_irq, cpu)[ipi] = irq;
|
|
|
|
bind_evtchn_to_cpu(evtchn, cpu);
|
|
}
|
|
|
|
out:
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
return irq;
|
|
}
|
|
|
|
|
|
int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
|
|
{
|
|
struct evtchn_bind_virq bind_virq;
|
|
int evtchn, irq;
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
irq = per_cpu(virq_to_irq, cpu)[virq];
|
|
|
|
if (irq == -1) {
|
|
irq = find_unbound_irq();
|
|
|
|
set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
|
|
handle_percpu_irq, "virq");
|
|
|
|
bind_virq.virq = virq;
|
|
bind_virq.vcpu = cpu;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
|
|
&bind_virq) != 0)
|
|
BUG();
|
|
evtchn = bind_virq.port;
|
|
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_virq_info(evtchn, virq);
|
|
|
|
per_cpu(virq_to_irq, cpu)[virq] = irq;
|
|
|
|
bind_evtchn_to_cpu(evtchn, cpu);
|
|
}
|
|
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
|
|
return irq;
|
|
}
|
|
|
|
static void unbind_from_irq(unsigned int irq)
|
|
{
|
|
struct evtchn_close close;
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
if (VALID_EVTCHN(evtchn)) {
|
|
close.port = evtchn;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
|
|
BUG();
|
|
|
|
switch (type_from_irq(irq)) {
|
|
case IRQT_VIRQ:
|
|
per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
|
|
[virq_from_irq(irq)] = -1;
|
|
break;
|
|
case IRQT_IPI:
|
|
per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
|
|
[ipi_from_irq(irq)] = -1;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Closed ports are implicitly re-bound to VCPU0. */
|
|
bind_evtchn_to_cpu(evtchn, 0);
|
|
|
|
evtchn_to_irq[evtchn] = -1;
|
|
}
|
|
|
|
if (irq_info[irq].type != IRQT_UNBOUND) {
|
|
irq_info[irq] = mk_unbound_info();
|
|
|
|
irq_free_desc(irq);
|
|
}
|
|
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
}
|
|
|
|
int bind_evtchn_to_irqhandler(unsigned int evtchn,
|
|
irq_handler_t handler,
|
|
unsigned long irqflags,
|
|
const char *devname, void *dev_id)
|
|
{
|
|
unsigned int irq;
|
|
int retval;
|
|
|
|
irq = bind_evtchn_to_irq(evtchn);
|
|
retval = request_irq(irq, handler, irqflags, devname, dev_id);
|
|
if (retval != 0) {
|
|
unbind_from_irq(irq);
|
|
return retval;
|
|
}
|
|
|
|
return irq;
|
|
}
|
|
EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
|
|
|
|
int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
|
|
irq_handler_t handler,
|
|
unsigned long irqflags, const char *devname, void *dev_id)
|
|
{
|
|
unsigned int irq;
|
|
int retval;
|
|
|
|
irq = bind_virq_to_irq(virq, cpu);
|
|
retval = request_irq(irq, handler, irqflags, devname, dev_id);
|
|
if (retval != 0) {
|
|
unbind_from_irq(irq);
|
|
return retval;
|
|
}
|
|
|
|
return irq;
|
|
}
|
|
EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
|
|
|
|
int bind_ipi_to_irqhandler(enum ipi_vector ipi,
|
|
unsigned int cpu,
|
|
irq_handler_t handler,
|
|
unsigned long irqflags,
|
|
const char *devname,
|
|
void *dev_id)
|
|
{
|
|
int irq, retval;
|
|
|
|
irq = bind_ipi_to_irq(ipi, cpu);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
irqflags |= IRQF_NO_SUSPEND;
|
|
retval = request_irq(irq, handler, irqflags, devname, dev_id);
|
|
if (retval != 0) {
|
|
unbind_from_irq(irq);
|
|
return retval;
|
|
}
|
|
|
|
return irq;
|
|
}
|
|
|
|
void unbind_from_irqhandler(unsigned int irq, void *dev_id)
|
|
{
|
|
free_irq(irq, dev_id);
|
|
unbind_from_irq(irq);
|
|
}
|
|
EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
|
|
|
|
void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
|
|
{
|
|
int irq = per_cpu(ipi_to_irq, cpu)[vector];
|
|
BUG_ON(irq < 0);
|
|
notify_remote_via_irq(irq);
|
|
}
|
|
|
|
irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct shared_info *sh = HYPERVISOR_shared_info;
|
|
int cpu = smp_processor_id();
|
|
unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
|
|
int i;
|
|
unsigned long flags;
|
|
static DEFINE_SPINLOCK(debug_lock);
|
|
struct vcpu_info *v;
|
|
|
|
spin_lock_irqsave(&debug_lock, flags);
|
|
|
|
printk("\nvcpu %d\n ", cpu);
|
|
|
|
for_each_online_cpu(i) {
|
|
int pending;
|
|
v = per_cpu(xen_vcpu, i);
|
|
pending = (get_irq_regs() && i == cpu)
|
|
? xen_irqs_disabled(get_irq_regs())
|
|
: v->evtchn_upcall_mask;
|
|
printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
|
|
pending, v->evtchn_upcall_pending,
|
|
(int)(sizeof(v->evtchn_pending_sel)*2),
|
|
v->evtchn_pending_sel);
|
|
}
|
|
v = per_cpu(xen_vcpu, cpu);
|
|
|
|
printk("\npending:\n ");
|
|
for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
|
|
printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
|
|
sh->evtchn_pending[i],
|
|
i % 8 == 0 ? "\n " : " ");
|
|
printk("\nglobal mask:\n ");
|
|
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
|
|
printk("%0*lx%s",
|
|
(int)(sizeof(sh->evtchn_mask[0])*2),
|
|
sh->evtchn_mask[i],
|
|
i % 8 == 0 ? "\n " : " ");
|
|
|
|
printk("\nglobally unmasked:\n ");
|
|
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
|
|
printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
|
|
sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
|
|
i % 8 == 0 ? "\n " : " ");
|
|
|
|
printk("\nlocal cpu%d mask:\n ", cpu);
|
|
for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
|
|
printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
|
|
cpu_evtchn[i],
|
|
i % 8 == 0 ? "\n " : " ");
|
|
|
|
printk("\nlocally unmasked:\n ");
|
|
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
|
|
unsigned long pending = sh->evtchn_pending[i]
|
|
& ~sh->evtchn_mask[i]
|
|
& cpu_evtchn[i];
|
|
printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
|
|
pending, i % 8 == 0 ? "\n " : " ");
|
|
}
|
|
|
|
printk("\npending list:\n");
|
|
for (i = 0; i < NR_EVENT_CHANNELS; i++) {
|
|
if (sync_test_bit(i, sh->evtchn_pending)) {
|
|
int word_idx = i / BITS_PER_LONG;
|
|
printk(" %d: event %d -> irq %d%s%s%s\n",
|
|
cpu_from_evtchn(i), i,
|
|
evtchn_to_irq[i],
|
|
sync_test_bit(word_idx, &v->evtchn_pending_sel)
|
|
? "" : " l2-clear",
|
|
!sync_test_bit(i, sh->evtchn_mask)
|
|
? "" : " globally-masked",
|
|
sync_test_bit(i, cpu_evtchn)
|
|
? "" : " locally-masked");
|
|
}
|
|
}
|
|
|
|
spin_unlock_irqrestore(&debug_lock, flags);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static DEFINE_PER_CPU(unsigned, xed_nesting_count);
|
|
|
|
/*
|
|
* Search the CPUs pending events bitmasks. For each one found, map
|
|
* the event number to an irq, and feed it into do_IRQ() for
|
|
* handling.
|
|
*
|
|
* Xen uses a two-level bitmap to speed searching. The first level is
|
|
* a bitset of words which contain pending event bits. The second
|
|
* level is a bitset of pending events themselves.
|
|
*/
|
|
static void __xen_evtchn_do_upcall(void)
|
|
{
|
|
int cpu = get_cpu();
|
|
struct shared_info *s = HYPERVISOR_shared_info;
|
|
struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
|
|
unsigned count;
|
|
|
|
do {
|
|
unsigned long pending_words;
|
|
|
|
vcpu_info->evtchn_upcall_pending = 0;
|
|
|
|
if (__get_cpu_var(xed_nesting_count)++)
|
|
goto out;
|
|
|
|
#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
|
|
/* Clear master flag /before/ clearing selector flag. */
|
|
wmb();
|
|
#endif
|
|
pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
|
|
while (pending_words != 0) {
|
|
unsigned long pending_bits;
|
|
int word_idx = __ffs(pending_words);
|
|
pending_words &= ~(1UL << word_idx);
|
|
|
|
while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
|
|
int bit_idx = __ffs(pending_bits);
|
|
int port = (word_idx * BITS_PER_LONG) + bit_idx;
|
|
int irq = evtchn_to_irq[port];
|
|
struct irq_desc *desc;
|
|
|
|
mask_evtchn(port);
|
|
clear_evtchn(port);
|
|
|
|
if (irq != -1) {
|
|
desc = irq_to_desc(irq);
|
|
if (desc)
|
|
generic_handle_irq_desc(irq, desc);
|
|
}
|
|
}
|
|
}
|
|
|
|
BUG_ON(!irqs_disabled());
|
|
|
|
count = __get_cpu_var(xed_nesting_count);
|
|
__get_cpu_var(xed_nesting_count) = 0;
|
|
} while (count != 1 || vcpu_info->evtchn_upcall_pending);
|
|
|
|
out:
|
|
|
|
put_cpu();
|
|
}
|
|
|
|
void xen_evtchn_do_upcall(struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
exit_idle();
|
|
irq_enter();
|
|
|
|
__xen_evtchn_do_upcall();
|
|
|
|
irq_exit();
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
void xen_hvm_evtchn_do_upcall(void)
|
|
{
|
|
__xen_evtchn_do_upcall();
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
|
|
|
|
/* Rebind a new event channel to an existing irq. */
|
|
void rebind_evtchn_irq(int evtchn, int irq)
|
|
{
|
|
struct irq_info *info = info_for_irq(irq);
|
|
|
|
/* Make sure the irq is masked, since the new event channel
|
|
will also be masked. */
|
|
disable_irq(irq);
|
|
|
|
spin_lock(&irq_mapping_update_lock);
|
|
|
|
/* After resume the irq<->evtchn mappings are all cleared out */
|
|
BUG_ON(evtchn_to_irq[evtchn] != -1);
|
|
/* Expect irq to have been bound before,
|
|
so there should be a proper type */
|
|
BUG_ON(info->type == IRQT_UNBOUND);
|
|
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_evtchn_info(evtchn);
|
|
|
|
spin_unlock(&irq_mapping_update_lock);
|
|
|
|
/* new event channels are always bound to cpu 0 */
|
|
irq_set_affinity(irq, cpumask_of(0));
|
|
|
|
/* Unmask the event channel. */
|
|
enable_irq(irq);
|
|
}
|
|
|
|
/* Rebind an evtchn so that it gets delivered to a specific cpu */
|
|
static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
|
{
|
|
struct evtchn_bind_vcpu bind_vcpu;
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
/* events delivered via platform PCI interrupts are always
|
|
* routed to vcpu 0 */
|
|
if (!VALID_EVTCHN(evtchn) ||
|
|
(xen_hvm_domain() && !xen_have_vector_callback))
|
|
return -1;
|
|
|
|
/* Send future instances of this interrupt to other vcpu. */
|
|
bind_vcpu.port = evtchn;
|
|
bind_vcpu.vcpu = tcpu;
|
|
|
|
/*
|
|
* If this fails, it usually just indicates that we're dealing with a
|
|
* virq or IPI channel, which don't actually need to be rebound. Ignore
|
|
* it, but don't do the xenlinux-level rebind in that case.
|
|
*/
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
|
|
bind_evtchn_to_cpu(evtchn, tcpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
|
|
{
|
|
unsigned tcpu = cpumask_first(dest);
|
|
|
|
return rebind_irq_to_cpu(irq, tcpu);
|
|
}
|
|
|
|
int resend_irq_on_evtchn(unsigned int irq)
|
|
{
|
|
int masked, evtchn = evtchn_from_irq(irq);
|
|
struct shared_info *s = HYPERVISOR_shared_info;
|
|
|
|
if (!VALID_EVTCHN(evtchn))
|
|
return 1;
|
|
|
|
masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
|
|
sync_set_bit(evtchn, s->evtchn_pending);
|
|
if (!masked)
|
|
unmask_evtchn(evtchn);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void enable_dynirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
unmask_evtchn(evtchn);
|
|
}
|
|
|
|
static void disable_dynirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
mask_evtchn(evtchn);
|
|
}
|
|
|
|
static void ack_dynirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
move_masked_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
unmask_evtchn(evtchn);
|
|
}
|
|
|
|
static int retrigger_dynirq(unsigned int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
struct shared_info *sh = HYPERVISOR_shared_info;
|
|
int ret = 0;
|
|
|
|
if (VALID_EVTCHN(evtchn)) {
|
|
int masked;
|
|
|
|
masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
|
|
sync_set_bit(evtchn, sh->evtchn_pending);
|
|
if (!masked)
|
|
unmask_evtchn(evtchn);
|
|
ret = 1;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void restore_cpu_virqs(unsigned int cpu)
|
|
{
|
|
struct evtchn_bind_virq bind_virq;
|
|
int virq, irq, evtchn;
|
|
|
|
for (virq = 0; virq < NR_VIRQS; virq++) {
|
|
if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
|
|
continue;
|
|
|
|
BUG_ON(virq_from_irq(irq) != virq);
|
|
|
|
/* Get a new binding from Xen. */
|
|
bind_virq.virq = virq;
|
|
bind_virq.vcpu = cpu;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
|
|
&bind_virq) != 0)
|
|
BUG();
|
|
evtchn = bind_virq.port;
|
|
|
|
/* Record the new mapping. */
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_virq_info(evtchn, virq);
|
|
bind_evtchn_to_cpu(evtchn, cpu);
|
|
}
|
|
}
|
|
|
|
static void restore_cpu_ipis(unsigned int cpu)
|
|
{
|
|
struct evtchn_bind_ipi bind_ipi;
|
|
int ipi, irq, evtchn;
|
|
|
|
for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
|
|
if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
|
|
continue;
|
|
|
|
BUG_ON(ipi_from_irq(irq) != ipi);
|
|
|
|
/* Get a new binding from Xen. */
|
|
bind_ipi.vcpu = cpu;
|
|
if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
|
|
&bind_ipi) != 0)
|
|
BUG();
|
|
evtchn = bind_ipi.port;
|
|
|
|
/* Record the new mapping. */
|
|
evtchn_to_irq[evtchn] = irq;
|
|
irq_info[irq] = mk_ipi_info(evtchn, ipi);
|
|
bind_evtchn_to_cpu(evtchn, cpu);
|
|
}
|
|
}
|
|
|
|
/* Clear an irq's pending state, in preparation for polling on it */
|
|
void xen_clear_irq_pending(int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
clear_evtchn(evtchn);
|
|
}
|
|
EXPORT_SYMBOL(xen_clear_irq_pending);
|
|
void xen_set_irq_pending(int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
set_evtchn(evtchn);
|
|
}
|
|
|
|
bool xen_test_irq_pending(int irq)
|
|
{
|
|
int evtchn = evtchn_from_irq(irq);
|
|
bool ret = false;
|
|
|
|
if (VALID_EVTCHN(evtchn))
|
|
ret = test_evtchn(evtchn);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Poll waiting for an irq to become pending with timeout. In the usual case,
|
|
* the irq will be disabled so it won't deliver an interrupt. */
|
|
void xen_poll_irq_timeout(int irq, u64 timeout)
|
|
{
|
|
evtchn_port_t evtchn = evtchn_from_irq(irq);
|
|
|
|
if (VALID_EVTCHN(evtchn)) {
|
|
struct sched_poll poll;
|
|
|
|
poll.nr_ports = 1;
|
|
poll.timeout = timeout;
|
|
set_xen_guest_handle(poll.ports, &evtchn);
|
|
|
|
if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
|
|
BUG();
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(xen_poll_irq_timeout);
|
|
/* Poll waiting for an irq to become pending. In the usual case, the
|
|
* irq will be disabled so it won't deliver an interrupt. */
|
|
void xen_poll_irq(int irq)
|
|
{
|
|
xen_poll_irq_timeout(irq, 0 /* no timeout */);
|
|
}
|
|
|
|
void xen_irq_resume(void)
|
|
{
|
|
unsigned int cpu, irq, evtchn;
|
|
struct irq_desc *desc;
|
|
|
|
init_evtchn_cpu_bindings();
|
|
|
|
/* New event-channel space is not 'live' yet. */
|
|
for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
|
|
mask_evtchn(evtchn);
|
|
|
|
/* No IRQ <-> event-channel mappings. */
|
|
for (irq = 0; irq < nr_irqs; irq++)
|
|
irq_info[irq].evtchn = 0; /* zap event-channel binding */
|
|
|
|
for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
|
|
evtchn_to_irq[evtchn] = -1;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
restore_cpu_virqs(cpu);
|
|
restore_cpu_ipis(cpu);
|
|
}
|
|
|
|
/*
|
|
* Unmask any IRQF_NO_SUSPEND IRQs which are enabled. These
|
|
* are not handled by the IRQ core.
|
|
*/
|
|
for_each_irq_desc(irq, desc) {
|
|
if (!desc->action || !(desc->action->flags & IRQF_NO_SUSPEND))
|
|
continue;
|
|
if (desc->status & IRQ_DISABLED)
|
|
continue;
|
|
|
|
evtchn = evtchn_from_irq(irq);
|
|
if (evtchn == -1)
|
|
continue;
|
|
|
|
unmask_evtchn(evtchn);
|
|
}
|
|
}
|
|
|
|
static struct irq_chip xen_dynamic_chip __read_mostly = {
|
|
.name = "xen-dyn",
|
|
|
|
.disable = disable_dynirq,
|
|
.mask = disable_dynirq,
|
|
.unmask = enable_dynirq,
|
|
|
|
.eoi = ack_dynirq,
|
|
.set_affinity = set_affinity_irq,
|
|
.retrigger = retrigger_dynirq,
|
|
};
|
|
|
|
static struct irq_chip xen_pirq_chip __read_mostly = {
|
|
.name = "xen-pirq",
|
|
|
|
.startup = startup_pirq,
|
|
.shutdown = shutdown_pirq,
|
|
|
|
.enable = enable_pirq,
|
|
.unmask = enable_pirq,
|
|
|
|
.disable = disable_pirq,
|
|
.mask = disable_pirq,
|
|
|
|
.ack = ack_pirq,
|
|
.end = end_pirq,
|
|
|
|
.set_affinity = set_affinity_irq,
|
|
|
|
.retrigger = retrigger_dynirq,
|
|
};
|
|
|
|
static struct irq_chip xen_percpu_chip __read_mostly = {
|
|
.name = "xen-percpu",
|
|
|
|
.disable = disable_dynirq,
|
|
.mask = disable_dynirq,
|
|
.unmask = enable_dynirq,
|
|
|
|
.ack = ack_dynirq,
|
|
};
|
|
|
|
int xen_set_callback_via(uint64_t via)
|
|
{
|
|
struct xen_hvm_param a;
|
|
a.domid = DOMID_SELF;
|
|
a.index = HVM_PARAM_CALLBACK_IRQ;
|
|
a.value = via;
|
|
return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_set_callback_via);
|
|
|
|
#ifdef CONFIG_XEN_PVHVM
|
|
/* Vector callbacks are better than PCI interrupts to receive event
|
|
* channel notifications because we can receive vector callbacks on any
|
|
* vcpu and we don't need PCI support or APIC interactions. */
|
|
void xen_callback_vector(void)
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|
{
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int rc;
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uint64_t callback_via;
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|
if (xen_have_vector_callback) {
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callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
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rc = xen_set_callback_via(callback_via);
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|
if (rc) {
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printk(KERN_ERR "Request for Xen HVM callback vector"
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|
" failed.\n");
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|
xen_have_vector_callback = 0;
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return;
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|
}
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|
printk(KERN_INFO "Xen HVM callback vector for event delivery is "
|
|
"enabled\n");
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|
/* in the restore case the vector has already been allocated */
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|
if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
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|
alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
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|
}
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|
}
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|
#else
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|
void xen_callback_vector(void) {}
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|
#endif
|
|
|
|
void __init xen_init_IRQ(void)
|
|
{
|
|
int i, rc;
|
|
struct physdev_nr_pirqs op_nr_pirqs;
|
|
|
|
cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
|
|
GFP_KERNEL);
|
|
irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
|
|
|
|
rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_nr_pirqs, &op_nr_pirqs);
|
|
if (rc < 0) {
|
|
nr_pirqs = nr_irqs;
|
|
if (rc != -ENOSYS)
|
|
printk(KERN_WARNING "PHYSDEVOP_get_nr_pirqs returned rc=%d\n", rc);
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|
} else {
|
|
if (xen_pv_domain() && !xen_initial_domain())
|
|
nr_pirqs = max((int)op_nr_pirqs.nr_pirqs, nr_irqs);
|
|
else
|
|
nr_pirqs = op_nr_pirqs.nr_pirqs;
|
|
}
|
|
pirq_to_irq = kcalloc(nr_pirqs, sizeof(*pirq_to_irq), GFP_KERNEL);
|
|
for (i = 0; i < nr_pirqs; i++)
|
|
pirq_to_irq[i] = -1;
|
|
|
|
evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
|
|
GFP_KERNEL);
|
|
for (i = 0; i < NR_EVENT_CHANNELS; i++)
|
|
evtchn_to_irq[i] = -1;
|
|
|
|
init_evtchn_cpu_bindings();
|
|
|
|
/* No event channels are 'live' right now. */
|
|
for (i = 0; i < NR_EVENT_CHANNELS; i++)
|
|
mask_evtchn(i);
|
|
|
|
if (xen_hvm_domain()) {
|
|
xen_callback_vector();
|
|
native_init_IRQ();
|
|
/* pci_xen_hvm_init must be called after native_init_IRQ so that
|
|
* __acpi_register_gsi can point at the right function */
|
|
pci_xen_hvm_init();
|
|
} else {
|
|
irq_ctx_init(smp_processor_id());
|
|
if (xen_initial_domain())
|
|
xen_setup_pirqs();
|
|
}
|
|
}
|