8fef6263ea
Remove the feature to configure the CLKR/FSR mux on McBSP port with 6pin configuration. When moving to devicetree these callback can no longer be used in a clean way anymore. If a board require to change the 6pin port to work in 4pin setup it needs to set up the mux in the board file. For OMAP2/3: u32 devconf0; /* McBSP1 CLKR/FSR signal to be connected to CLKX/FSX pin */ devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); devconf0 |= OMAP2_MCBSP1_CLKR_MASK | OMAP2_MCBSP1_FSR_MASK; omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0); For OMAP4: u32 mcbsp_pad; /* McBSP4 CLKR/FSR signal to be connected to CLKX/FSX pin */ mcbsp_pad = omap4_ctrl_pad_readl(OMAP2_CONTROL_DEVCONF0); mcbsp_pad |= ((1 << 31) | (1 << 30)); omap4_ctrl_pad_writel(mcbsp_pad, OMAP2_CONTROL_DEVCONF0); In case when the kernel is booted with DT blob the pinctrl-single will be provided as soon as it is enabled on the platform. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
120 lines
3 KiB
C
120 lines
3 KiB
C
/*
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* linux/arch/arm/mach-omap2/mcbsp.c
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*
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* Copyright (C) 2008 Instituto Nokia de Tecnologia
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* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Multichannel mode not supported.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <mach/irqs.h>
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#include <plat/dma.h>
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#include <plat/cpu.h>
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#include <plat/mcbsp.h>
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#include <plat/omap_device.h>
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#include <linux/pm_runtime.h>
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/*
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* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
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* Sidetone needs non-gated ICLK and sidetone autoidle is broken.
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*/
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#include "cm2xxx_3xxx.h"
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#include "cm-regbits-34xx.h"
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static int omap3_enable_st_clock(unsigned int id, bool enable)
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{
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unsigned int w;
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/*
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* Sidetone uses McBSP ICLK - which must not idle when sidetones
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* are enabled or sidetones start sounding ugly.
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*/
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w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
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if (enable)
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w &= ~(1 << (id - 2));
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else
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w |= 1 << (id - 2);
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omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
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return 0;
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}
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static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
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{
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int id, count = 1;
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char *name = "omap-mcbsp";
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struct omap_hwmod *oh_device[2];
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struct omap_mcbsp_platform_data *pdata = NULL;
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struct platform_device *pdev;
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sscanf(oh->name, "mcbsp%d", &id);
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pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
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if (!pdata) {
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pr_err("%s: No memory for mcbsp\n", __func__);
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return -ENOMEM;
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}
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pdata->reg_step = 4;
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if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
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pdata->reg_size = 2;
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} else {
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pdata->reg_size = 4;
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pdata->has_ccr = true;
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}
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if (oh->class->rev == MCBSP_CONFIG_TYPE2) {
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/* The FIFO has 128 locations */
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pdata->buffer_size = 0x80;
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} else if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
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if (id == 2)
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/* The FIFO has 1024 + 256 locations */
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pdata->buffer_size = 0x500;
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else
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/* The FIFO has 128 locations */
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pdata->buffer_size = 0x80;
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} else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
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/* The FIFO has 128 locations for all instances */
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pdata->buffer_size = 0x80;
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}
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if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
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pdata->has_wakeup = true;
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oh_device[0] = oh;
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if (oh->dev_attr) {
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oh_device[1] = omap_hwmod_lookup((
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(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
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pdata->enable_st_clock = omap3_enable_st_clock;
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count++;
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}
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pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
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sizeof(*pdata), NULL, 0, false);
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kfree(pdata);
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if (IS_ERR(pdev)) {
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pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
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name, oh->name);
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return PTR_ERR(pdev);
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}
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return 0;
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}
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static int __init omap2_mcbsp_init(void)
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{
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omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
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return 0;
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}
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arch_initcall(omap2_mcbsp_init);
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