2d4dc890b5
Mtdblock driver doesn't call flush_dcache_page for pages in request. So, this causes problems on architectures where the icache doesn't fill from the dcache or with dcache aliases. The patch fixes this. The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid pointless empty cache-thrashing loops on architectures for which flush_dcache_page() is a no-op. Every architecture was provided with this flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is equal 1 or do nothing otherwise. See "fix mtd_blkdevs problem with caches on some architectures" discussion on LKML for more information. Signed-off-by: Ilya Loginov <isloginov@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Peter Horton <phorton@bitbox.co.uk> Cc: "Ed L. Cashin" <ecashin@coraid.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
54 lines
1.7 KiB
C
54 lines
1.7 KiB
C
#ifndef _ASM_IA64_CACHEFLUSH_H
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#define _ASM_IA64_CACHEFLUSH_H
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/*
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* Copyright (C) 2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <linux/page-flags.h>
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#include <linux/bitops.h>
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#include <asm/page.h>
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/*
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* Cache flushing routines. This is the kind of stuff that can be very expensive, so try
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* to avoid them whenever possible.
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*/
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define flush_icache_page(vma,page) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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#define flush_dcache_page(page) \
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do { \
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clear_bit(PG_arch_1, &(page)->flags); \
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} while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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extern void flush_icache_range (unsigned long start, unsigned long end);
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extern void clflush_cache_range(void *addr, int size);
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#define flush_icache_user_range(vma, page, user_addr, len) \
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do { \
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unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK); \
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flush_icache_range(_addr, _addr + (len)); \
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} while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { memcpy(dst, src, len); \
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flush_icache_user_range(vma, page, vaddr, len); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#endif /* _ASM_IA64_CACHEFLUSH_H */
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