5f3cc4474c
Add a video device driver per each FIMC entity to support the camera capture input mode. Video capture node is registered only if CCD sensor data is provided through driver's platfrom data and board setup code. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/*
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* Samsung S5P SoC camera interface driver header
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd
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* Author: Sylwester Nawrocki, <s.nawrocki@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef S3C_FIMC_H_
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#define S3C_FIMC_H_
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enum cam_bus_type {
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FIMC_ITU_601 = 1,
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FIMC_ITU_656,
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FIMC_MIPI_CSI2,
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FIMC_LCD_WB, /* FIFO link from LCD mixer */
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};
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#define FIMC_CLK_INV_PCLK (1 << 0)
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#define FIMC_CLK_INV_VSYNC (1 << 1)
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#define FIMC_CLK_INV_HREF (1 << 2)
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#define FIMC_CLK_INV_HSYNC (1 << 3)
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struct i2c_board_info;
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/**
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* struct s3c_fimc_isp_info - image sensor information required for host
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* interace configuration.
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*
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* @board_info: pointer to I2C subdevice's board info
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* @bus_type: determines bus type, MIPI, ITU-R BT.601 etc.
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* @i2c_bus_num: i2c control bus id the sensor is attached to
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* @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
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* @bus_width: camera data bus width in bits
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* @flags: flags defining bus signals polarity inversion (High by default)
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*/
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struct s3c_fimc_isp_info {
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struct i2c_board_info *board_info;
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enum cam_bus_type bus_type;
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u16 i2c_bus_num;
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u16 mux_id;
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u16 bus_width;
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u16 flags;
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};
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#define FIMC_MAX_CAMIF_CLIENTS 2
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/**
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* struct s3c_platform_fimc - camera host interface platform data
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*
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* @isp_info: properties of camera sensor required for host interface setup
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*/
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struct s3c_platform_fimc {
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struct s3c_fimc_isp_info *isp_info[FIMC_MAX_CAMIF_CLIENTS];
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};
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#endif /* S3C_FIMC_H_ */
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