ee031c31d6
Define a per cpu bitmap that contains the banks polled by the machine check poller. This is needed for the CMCI code in the next patches to be able to disable polling on specific banks. The bank by default contains all banks, so there is no behaviour change. Only future code will remove some banks from the polling set. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
681 lines
15 KiB
C
681 lines
15 KiB
C
/*
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* (c) 2005, 2006 Advanced Micro Devices, Inc.
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* Your use of this code is subject to the terms and conditions of the
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* GNU general public license version 2. See "COPYING" or
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* http://www.gnu.org/licenses/gpl.html
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*
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* Written by Jacob Shin - AMD, Inc.
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*
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* Support : jacob.shin@amd.com
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*
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* April 2006
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* - added support for AMD Family 0x10 processors
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*
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* All MC4_MISCi registers are shared between multi-cores
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*/
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kobject.h>
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#include <linux/notifier.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/sysdev.h>
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#include <linux/sysfs.h>
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#include <asm/apic.h>
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#include <asm/mce.h>
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#include <asm/msr.h>
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#include <asm/percpu.h>
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#include <asm/idle.h>
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#define PFX "mce_threshold: "
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#define VERSION "version 1.1.1"
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#define NR_BANKS 6
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#define NR_BLOCKS 9
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#define THRESHOLD_MAX 0xFFF
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#define INT_TYPE_APIC 0x00020000
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#define MASK_VALID_HI 0x80000000
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#define MASK_CNTP_HI 0x40000000
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#define MASK_LOCKED_HI 0x20000000
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#define MASK_LVTOFF_HI 0x00F00000
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#define MASK_COUNT_EN_HI 0x00080000
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#define MASK_INT_TYPE_HI 0x00060000
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#define MASK_OVERFLOW_HI 0x00010000
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#define MASK_ERR_COUNT_HI 0x00000FFF
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#define MASK_BLKPTR_LO 0xFF000000
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#define MCG_XBLK_ADDR 0xC0000400
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struct threshold_block {
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unsigned int block;
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unsigned int bank;
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unsigned int cpu;
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u32 address;
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u16 interrupt_enable;
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u16 threshold_limit;
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struct kobject kobj;
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struct list_head miscj;
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};
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/* defaults used early on boot */
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static struct threshold_block threshold_defaults = {
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.interrupt_enable = 0,
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.threshold_limit = THRESHOLD_MAX,
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};
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struct threshold_bank {
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struct kobject *kobj;
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struct threshold_block *blocks;
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cpumask_t cpus;
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};
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static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
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#ifdef CONFIG_SMP
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static unsigned char shared_bank[NR_BANKS] = {
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0, 0, 0, 0, 1
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};
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#endif
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static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
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static void amd_threshold_interrupt(void);
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/*
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* CPU Initialization
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*/
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struct thresh_restart {
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struct threshold_block *b;
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int reset;
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u16 old_limit;
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};
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/* must be called with correct cpu affinity */
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static long threshold_restart_bank(void *_tr)
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{
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struct thresh_restart *tr = _tr;
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u32 mci_misc_hi, mci_misc_lo;
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rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
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if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
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tr->reset = 1; /* limit cannot be lower than err count */
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if (tr->reset) { /* reset err count and overflow bit */
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mci_misc_hi =
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(mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
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(THRESHOLD_MAX - tr->b->threshold_limit);
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} else if (tr->old_limit) { /* change limit w/o reset */
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int new_count = (mci_misc_hi & THRESHOLD_MAX) +
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(tr->old_limit - tr->b->threshold_limit);
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mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
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(new_count & THRESHOLD_MAX);
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}
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tr->b->interrupt_enable ?
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(mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
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(mci_misc_hi &= ~MASK_INT_TYPE_HI);
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mci_misc_hi |= MASK_COUNT_EN_HI;
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wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
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return 0;
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}
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/* cpu init entry point, called from mce.c with preempt off */
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void mce_amd_feature_init(struct cpuinfo_x86 *c)
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{
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unsigned int bank, block;
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unsigned int cpu = smp_processor_id();
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u8 lvt_off;
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u32 low = 0, high = 0, address = 0;
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struct thresh_restart tr;
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for (bank = 0; bank < NR_BANKS; ++bank) {
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for (block = 0; block < NR_BLOCKS; ++block) {
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if (block == 0)
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address = MSR_IA32_MC0_MISC + bank * 4;
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else if (block == 1) {
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address = (low & MASK_BLKPTR_LO) >> 21;
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if (!address)
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break;
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address += MCG_XBLK_ADDR;
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}
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else
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++address;
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if (rdmsr_safe(address, &low, &high))
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break;
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if (!(high & MASK_VALID_HI)) {
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if (block)
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continue;
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else
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break;
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}
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if (!(high & MASK_CNTP_HI) ||
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(high & MASK_LOCKED_HI))
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continue;
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if (!block)
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per_cpu(bank_map, cpu) |= (1 << bank);
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#ifdef CONFIG_SMP
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if (shared_bank[bank] && c->cpu_core_id)
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break;
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#endif
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lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
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APIC_EILVT_MSG_FIX, 0);
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high &= ~MASK_LVTOFF_HI;
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high |= lvt_off << 20;
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wrmsr(address, low, high);
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threshold_defaults.address = address;
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tr.b = &threshold_defaults;
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tr.reset = 0;
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tr.old_limit = 0;
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threshold_restart_bank(&tr);
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mce_threshold_vector = amd_threshold_interrupt;
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}
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}
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}
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/*
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* APIC Interrupt Handler
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*/
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/*
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* threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
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* the interrupt goes off when error_count reaches threshold_limit.
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* the handler will simply log mcelog w/ software defined bank number.
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*/
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static void amd_threshold_interrupt(void)
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{
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unsigned int bank, block;
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struct mce m;
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u32 low = 0, high = 0, address = 0;
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mce_setup(&m);
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/* assume first bank caused it */
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for (bank = 0; bank < NR_BANKS; ++bank) {
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if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
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continue;
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for (block = 0; block < NR_BLOCKS; ++block) {
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if (block == 0)
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address = MSR_IA32_MC0_MISC + bank * 4;
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else if (block == 1) {
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address = (low & MASK_BLKPTR_LO) >> 21;
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if (!address)
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break;
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address += MCG_XBLK_ADDR;
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}
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else
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++address;
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if (rdmsr_safe(address, &low, &high))
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break;
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if (!(high & MASK_VALID_HI)) {
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if (block)
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continue;
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else
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break;
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}
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if (!(high & MASK_CNTP_HI) ||
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(high & MASK_LOCKED_HI))
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continue;
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/* Log the machine check that caused the threshold
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event. */
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machine_check_poll(MCP_TIMESTAMP,
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&__get_cpu_var(mce_poll_banks));
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if (high & MASK_OVERFLOW_HI) {
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rdmsrl(address, m.misc);
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rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
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m.status);
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m.bank = K8_MCE_THRESHOLD_BASE
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+ bank * NR_BLOCKS
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+ block;
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mce_log(&m);
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return;
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}
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}
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}
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}
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/*
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* Sysfs Interface
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*/
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struct threshold_attr {
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struct attribute attr;
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ssize_t(*show) (struct threshold_block *, char *);
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ssize_t(*store) (struct threshold_block *, const char *, size_t count);
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};
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#define SHOW_FIELDS(name) \
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static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
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{ \
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return sprintf(buf, "%lx\n", (unsigned long) b->name); \
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}
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SHOW_FIELDS(interrupt_enable)
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SHOW_FIELDS(threshold_limit)
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static ssize_t store_interrupt_enable(struct threshold_block *b,
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const char *buf, size_t count)
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{
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char *end;
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struct thresh_restart tr;
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unsigned long new = simple_strtoul(buf, &end, 0);
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if (end == buf)
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return -EINVAL;
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b->interrupt_enable = !!new;
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tr.b = b;
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tr.reset = 0;
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tr.old_limit = 0;
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work_on_cpu(b->cpu, threshold_restart_bank, &tr);
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return end - buf;
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}
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static ssize_t store_threshold_limit(struct threshold_block *b,
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const char *buf, size_t count)
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{
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char *end;
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struct thresh_restart tr;
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unsigned long new = simple_strtoul(buf, &end, 0);
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if (end == buf)
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return -EINVAL;
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if (new > THRESHOLD_MAX)
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new = THRESHOLD_MAX;
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if (new < 1)
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new = 1;
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tr.old_limit = b->threshold_limit;
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b->threshold_limit = new;
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tr.b = b;
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tr.reset = 0;
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work_on_cpu(b->cpu, threshold_restart_bank, &tr);
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return end - buf;
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}
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static long local_error_count(void *_b)
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{
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struct threshold_block *b = _b;
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u32 low, high;
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rdmsr(b->address, low, high);
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return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
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}
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static ssize_t show_error_count(struct threshold_block *b, char *buf)
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{
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return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
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}
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static ssize_t store_error_count(struct threshold_block *b,
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const char *buf, size_t count)
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{
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struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
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work_on_cpu(b->cpu, threshold_restart_bank, &tr);
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return 1;
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}
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#define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
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.attr = {.name = __stringify(_name), .mode = _mode }, \
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.show = _show, \
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.store = _store, \
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};
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#define RW_ATTR(name) \
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static struct threshold_attr name = \
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THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
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RW_ATTR(interrupt_enable);
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RW_ATTR(threshold_limit);
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RW_ATTR(error_count);
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static struct attribute *default_attrs[] = {
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&interrupt_enable.attr,
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&threshold_limit.attr,
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&error_count.attr,
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NULL
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};
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#define to_block(k) container_of(k, struct threshold_block, kobj)
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#define to_attr(a) container_of(a, struct threshold_attr, attr)
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static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
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{
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struct threshold_block *b = to_block(kobj);
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struct threshold_attr *a = to_attr(attr);
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ssize_t ret;
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ret = a->show ? a->show(b, buf) : -EIO;
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return ret;
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}
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static ssize_t store(struct kobject *kobj, struct attribute *attr,
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const char *buf, size_t count)
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{
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struct threshold_block *b = to_block(kobj);
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struct threshold_attr *a = to_attr(attr);
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ssize_t ret;
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ret = a->store ? a->store(b, buf, count) : -EIO;
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return ret;
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}
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static struct sysfs_ops threshold_ops = {
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.show = show,
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.store = store,
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};
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static struct kobj_type threshold_ktype = {
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.sysfs_ops = &threshold_ops,
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.default_attrs = default_attrs,
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};
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static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
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unsigned int bank,
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unsigned int block,
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u32 address)
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{
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int err;
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u32 low, high;
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struct threshold_block *b = NULL;
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if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
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return 0;
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if (rdmsr_safe(address, &low, &high))
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return 0;
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if (!(high & MASK_VALID_HI)) {
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if (block)
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goto recurse;
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else
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return 0;
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}
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if (!(high & MASK_CNTP_HI) ||
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(high & MASK_LOCKED_HI))
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goto recurse;
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b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
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if (!b)
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return -ENOMEM;
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b->block = block;
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b->bank = bank;
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b->cpu = cpu;
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b->address = address;
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b->interrupt_enable = 0;
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b->threshold_limit = THRESHOLD_MAX;
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INIT_LIST_HEAD(&b->miscj);
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if (per_cpu(threshold_banks, cpu)[bank]->blocks)
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list_add(&b->miscj,
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&per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
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else
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per_cpu(threshold_banks, cpu)[bank]->blocks = b;
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err = kobject_init_and_add(&b->kobj, &threshold_ktype,
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per_cpu(threshold_banks, cpu)[bank]->kobj,
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"misc%i", block);
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if (err)
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goto out_free;
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recurse:
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if (!block) {
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address = (low & MASK_BLKPTR_LO) >> 21;
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if (!address)
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return 0;
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address += MCG_XBLK_ADDR;
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} else
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++address;
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err = allocate_threshold_blocks(cpu, bank, ++block, address);
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if (err)
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goto out_free;
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if (b)
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kobject_uevent(&b->kobj, KOBJ_ADD);
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return err;
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out_free:
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if (b) {
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kobject_put(&b->kobj);
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kfree(b);
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}
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return err;
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}
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static __cpuinit long local_allocate_threshold_blocks(void *_bank)
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{
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unsigned int *bank = _bank;
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return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
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MSR_IA32_MC0_MISC + *bank * 4);
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}
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/* symlinks sibling shared banks to first core. first core owns dir/files. */
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static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
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{
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int i, err = 0;
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struct threshold_bank *b = NULL;
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char name[32];
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sprintf(name, "threshold_bank%i", bank);
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#ifdef CONFIG_SMP
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if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
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i = first_cpu(per_cpu(cpu_core_map, cpu));
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/* first core not up yet */
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if (cpu_data(i).cpu_core_id)
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goto out;
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/* already linked */
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if (per_cpu(threshold_banks, cpu)[bank])
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goto out;
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b = per_cpu(threshold_banks, i)[bank];
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if (!b)
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goto out;
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err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
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b->kobj, name);
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if (err)
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goto out;
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b->cpus = per_cpu(cpu_core_map, cpu);
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per_cpu(threshold_banks, cpu)[bank] = b;
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goto out;
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}
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#endif
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b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
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if (!b) {
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err = -ENOMEM;
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goto out;
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}
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b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
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if (!b->kobj)
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goto out_free;
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#ifndef CONFIG_SMP
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b->cpus = CPU_MASK_ALL;
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#else
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b->cpus = per_cpu(cpu_core_map, cpu);
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#endif
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per_cpu(threshold_banks, cpu)[bank] = b;
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err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
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if (err)
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goto out_free;
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for_each_cpu_mask_nr(i, b->cpus) {
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if (i == cpu)
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continue;
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err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
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b->kobj, name);
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if (err)
|
|
goto out;
|
|
|
|
per_cpu(threshold_banks, i)[bank] = b;
|
|
}
|
|
|
|
goto out;
|
|
|
|
out_free:
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
|
kfree(b);
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
/* create dir/files for all valid threshold banks */
|
|
static __cpuinit int threshold_create_device(unsigned int cpu)
|
|
{
|
|
unsigned int bank;
|
|
int err = 0;
|
|
|
|
for (bank = 0; bank < NR_BANKS; ++bank) {
|
|
if (!(per_cpu(bank_map, cpu) & (1 << bank)))
|
|
continue;
|
|
err = threshold_create_bank(cpu, bank);
|
|
if (err)
|
|
goto out;
|
|
}
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* let's be hotplug friendly.
|
|
* in case of multiple core processors, the first core always takes ownership
|
|
* of shared sysfs dir/files, and rest of the cores will be symlinked to it.
|
|
*/
|
|
|
|
static void deallocate_threshold_block(unsigned int cpu,
|
|
unsigned int bank)
|
|
{
|
|
struct threshold_block *pos = NULL;
|
|
struct threshold_block *tmp = NULL;
|
|
struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
|
|
|
|
if (!head)
|
|
return;
|
|
|
|
list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
|
|
kobject_put(&pos->kobj);
|
|
list_del(&pos->miscj);
|
|
kfree(pos);
|
|
}
|
|
|
|
kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
|
|
per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
|
|
}
|
|
|
|
static void threshold_remove_bank(unsigned int cpu, int bank)
|
|
{
|
|
int i = 0;
|
|
struct threshold_bank *b;
|
|
char name[32];
|
|
|
|
b = per_cpu(threshold_banks, cpu)[bank];
|
|
|
|
if (!b)
|
|
return;
|
|
|
|
if (!b->blocks)
|
|
goto free_out;
|
|
|
|
sprintf(name, "threshold_bank%i", bank);
|
|
|
|
#ifdef CONFIG_SMP
|
|
/* sibling symlink */
|
|
if (shared_bank[bank] && b->blocks->cpu != cpu) {
|
|
sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
/* remove all sibling symlinks before unregistering */
|
|
for_each_cpu_mask_nr(i, b->cpus) {
|
|
if (i == cpu)
|
|
continue;
|
|
|
|
sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
|
|
per_cpu(threshold_banks, i)[bank] = NULL;
|
|
}
|
|
|
|
deallocate_threshold_block(cpu, bank);
|
|
|
|
free_out:
|
|
kobject_del(b->kobj);
|
|
kobject_put(b->kobj);
|
|
kfree(b);
|
|
per_cpu(threshold_banks, cpu)[bank] = NULL;
|
|
}
|
|
|
|
static void threshold_remove_device(unsigned int cpu)
|
|
{
|
|
unsigned int bank;
|
|
|
|
for (bank = 0; bank < NR_BANKS; ++bank) {
|
|
if (!(per_cpu(bank_map, cpu) & (1 << bank)))
|
|
continue;
|
|
threshold_remove_bank(cpu, bank);
|
|
}
|
|
}
|
|
|
|
/* get notified when a cpu comes on/off */
|
|
static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
|
|
unsigned int cpu)
|
|
{
|
|
if (cpu >= NR_CPUS)
|
|
return;
|
|
|
|
switch (action) {
|
|
case CPU_ONLINE:
|
|
case CPU_ONLINE_FROZEN:
|
|
threshold_create_device(cpu);
|
|
break;
|
|
case CPU_DEAD:
|
|
case CPU_DEAD_FROZEN:
|
|
threshold_remove_device(cpu);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
static __init int threshold_init_device(void)
|
|
{
|
|
unsigned lcpu = 0;
|
|
|
|
/* to hit CPUs online before the notifier is up */
|
|
for_each_online_cpu(lcpu) {
|
|
int err = threshold_create_device(lcpu);
|
|
if (err)
|
|
return err;
|
|
}
|
|
threshold_cpu_callback = amd_64_threshold_cpu_callback;
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(threshold_init_device);
|