abe11ddea1
* arc-uart platform device now populated dynamically, using
of_platform_populate() - applies to any other device whatsoever.
* uart in turn requires incore arc-intc to be also present in DT
* A irq-domain needs to be instantiated for IRQ requests by DT probed
device (e.g. arc-uart)
TODO: switch over to linear irq domain once all devs have been
transitioned to DT
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Arnd Bergmann <arnd@arndb.de>
161 lines
3.6 KiB
C
161 lines
3.6 KiB
C
/*
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* Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/irqdomain.h>
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#include <asm/sections.h>
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#include <asm/irq.h>
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/*
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* Early Hardware specific Interrupt setup
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* -Called very early (start_kernel -> setup_arch -> setup_processor)
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* -Platform Independent (must for any ARC700)
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* -Needed for each CPU (hence not foldable into init_IRQ)
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*
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* what it does ?
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* -setup Vector Table Base Reg - in case Linux not linked at 0x8000_0000
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* -Disable all IRQs (on CPU side)
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*/
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void __init arc_init_IRQ(void)
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{
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int level_mask = level_mask;
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write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds);
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/* Disable all IRQs: enable them as devices request */
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write_aux_reg(AUX_IENABLE, 0);
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}
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/*
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* ARC700 core includes a simple on-chip intc supporting
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* -per IRQ enable/disable
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* -2 levels of interrupts (high/low)
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* -all interrupts being level triggered
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*
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* To reduce platform code, we assume all IRQs directly hooked-up into intc.
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* Platforms with external intc, hence cascaded IRQs, are free to over-ride
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* below, per IRQ.
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*/
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static void arc_mask_irq(struct irq_data *data)
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{
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arch_mask_irq(data->irq);
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}
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static void arc_unmask_irq(struct irq_data *data)
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{
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arch_unmask_irq(data->irq);
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}
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static struct irq_chip onchip_intc = {
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.name = "ARC In-core Intc",
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.irq_mask = arc_mask_irq,
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.irq_unmask = arc_unmask_irq,
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};
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static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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if (irq == TIMER0_IRQ)
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irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq);
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else
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irq_set_chip_and_handler(irq, &onchip_intc, handle_level_irq);
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return 0;
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}
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static const struct irq_domain_ops arc_intc_domain_ops = {
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.xlate = irq_domain_xlate_onecell,
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.map = arc_intc_domain_map,
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};
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static struct irq_domain *root_domain;
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void __init init_onchip_IRQ(void)
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{
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struct device_node *intc = NULL;
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intc = of_find_compatible_node(NULL, NULL, "snps,arc700-intc");
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if(!intc)
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panic("DeviceTree Missing incore intc\n");
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root_domain = irq_domain_add_legacy(intc, NR_IRQS, 0, 0,
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&arc_intc_domain_ops, NULL);
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if (!root_domain)
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panic("root irq domain not avail\n");
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/* with this we don't need to export root_domain */
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irq_set_default_host(root_domain);
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}
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/*
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* Late Interrupt system init called from start_kernel for Boot CPU only
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*
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* Since slab must already be initialized, platforms can start doing any
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* needed request_irq( )s
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*/
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void __init init_IRQ(void)
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{
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init_onchip_IRQ();
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plat_init_IRQ();
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}
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/*
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* "C" Entry point for any ARC ISR, called from low level vector handler
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* @irq is the vector number read from ICAUSE reg of on-chip intc
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*/
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void arch_do_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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generic_handle_irq(irq);
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irq_exit();
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set_irq_regs(old_regs);
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}
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int __init get_hw_config_num_irq(void)
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{
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uint32_t val = read_aux_reg(ARC_REG_VECBASE_BCR);
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switch (val & 0x03) {
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case 0:
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return 16;
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case 1:
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return 32;
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case 2:
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return 8;
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default:
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return 0;
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}
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return 0;
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}
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void arch_local_irq_enable(void)
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{
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unsigned long flags;
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/*
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* ARC IDE Drivers tries to re-enable interrupts from hard-isr
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* context which is simply wrong
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*/
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if (in_irq()) {
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WARN_ONCE(1, "IRQ enabled from hard-isr");
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return;
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}
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flags = arch_local_save_flags();
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flags |= (STATUS_E1_MASK | STATUS_E2_MASK);
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arch_local_irq_restore(flags);
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}
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EXPORT_SYMBOL(arch_local_irq_enable);
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