85cbc50378
introduce pv_irq_ops which adds hooks to paravirtualize irq related operations. On virtualized environment, interruption may be replaced by something virtualization friendly. So the irq related operation also may need paravirtualization. This patch adds necessary hooks to paravirtualize irq related operations. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
354 lines
8.3 KiB
C
354 lines
8.3 KiB
C
/******************************************************************************
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* arch/ia64/kernel/paravirt.c
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*
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* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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* Yaozu (Eddie) Dong <eddie.dong@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/init.h>
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#include <linux/compiler.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <asm/iosapic.h>
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#include <asm/paravirt.h>
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/***************************************************************************
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* general info
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*/
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struct pv_info pv_info = {
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.kernel_rpl = 0,
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.paravirt_enabled = 0,
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.name = "bare hardware"
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};
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/***************************************************************************
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* pv_init_ops
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* initialization hooks.
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*/
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struct pv_init_ops pv_init_ops;
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/***************************************************************************
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* pv_cpu_ops
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* intrinsics hooks.
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*/
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/* ia64_native_xxx are macros so that we have to make them real functions */
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#define DEFINE_VOID_FUNC1(name) \
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static void \
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ia64_native_ ## name ## _func(unsigned long arg) \
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{ \
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ia64_native_ ## name(arg); \
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} \
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#define DEFINE_VOID_FUNC2(name) \
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static void \
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ia64_native_ ## name ## _func(unsigned long arg0, \
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unsigned long arg1) \
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{ \
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ia64_native_ ## name(arg0, arg1); \
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} \
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#define DEFINE_FUNC0(name) \
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static unsigned long \
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ia64_native_ ## name ## _func(void) \
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{ \
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return ia64_native_ ## name(); \
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}
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#define DEFINE_FUNC1(name, type) \
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static unsigned long \
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ia64_native_ ## name ## _func(type arg) \
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{ \
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return ia64_native_ ## name(arg); \
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} \
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DEFINE_VOID_FUNC1(fc);
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DEFINE_VOID_FUNC1(intrin_local_irq_restore);
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DEFINE_VOID_FUNC2(ptcga);
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DEFINE_VOID_FUNC2(set_rr);
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DEFINE_FUNC0(get_psr_i);
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DEFINE_FUNC1(thash, unsigned long);
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DEFINE_FUNC1(get_cpuid, int);
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DEFINE_FUNC1(get_pmd, int);
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DEFINE_FUNC1(get_rr, unsigned long);
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static void
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ia64_native_ssm_i_func(void)
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{
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ia64_native_ssm(IA64_PSR_I);
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}
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static void
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ia64_native_rsm_i_func(void)
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{
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ia64_native_rsm(IA64_PSR_I);
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}
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static void
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ia64_native_set_rr0_to_rr4_func(unsigned long val0, unsigned long val1,
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unsigned long val2, unsigned long val3,
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unsigned long val4)
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{
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ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4);
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}
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#define CASE_GET_REG(id) \
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case _IA64_REG_ ## id: \
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res = ia64_native_getreg(_IA64_REG_ ## id); \
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break;
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#define CASE_GET_AR(id) CASE_GET_REG(AR_ ## id)
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#define CASE_GET_CR(id) CASE_GET_REG(CR_ ## id)
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unsigned long
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ia64_native_getreg_func(int regnum)
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{
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unsigned long res = -1;
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switch (regnum) {
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CASE_GET_REG(GP);
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CASE_GET_REG(IP);
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CASE_GET_REG(PSR);
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CASE_GET_REG(TP);
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CASE_GET_REG(SP);
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CASE_GET_AR(KR0);
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CASE_GET_AR(KR1);
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CASE_GET_AR(KR2);
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CASE_GET_AR(KR3);
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CASE_GET_AR(KR4);
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CASE_GET_AR(KR5);
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CASE_GET_AR(KR6);
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CASE_GET_AR(KR7);
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CASE_GET_AR(RSC);
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CASE_GET_AR(BSP);
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CASE_GET_AR(BSPSTORE);
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CASE_GET_AR(RNAT);
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CASE_GET_AR(FCR);
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CASE_GET_AR(EFLAG);
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CASE_GET_AR(CSD);
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CASE_GET_AR(SSD);
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CASE_GET_AR(CFLAG);
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CASE_GET_AR(FSR);
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CASE_GET_AR(FIR);
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CASE_GET_AR(FDR);
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CASE_GET_AR(CCV);
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CASE_GET_AR(UNAT);
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CASE_GET_AR(FPSR);
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CASE_GET_AR(ITC);
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CASE_GET_AR(PFS);
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CASE_GET_AR(LC);
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CASE_GET_AR(EC);
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CASE_GET_CR(DCR);
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CASE_GET_CR(ITM);
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CASE_GET_CR(IVA);
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CASE_GET_CR(PTA);
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CASE_GET_CR(IPSR);
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CASE_GET_CR(ISR);
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CASE_GET_CR(IIP);
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CASE_GET_CR(IFA);
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CASE_GET_CR(ITIR);
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CASE_GET_CR(IIPA);
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CASE_GET_CR(IFS);
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CASE_GET_CR(IIM);
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CASE_GET_CR(IHA);
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CASE_GET_CR(LID);
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CASE_GET_CR(IVR);
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CASE_GET_CR(TPR);
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CASE_GET_CR(EOI);
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CASE_GET_CR(IRR0);
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CASE_GET_CR(IRR1);
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CASE_GET_CR(IRR2);
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CASE_GET_CR(IRR3);
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CASE_GET_CR(ITV);
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CASE_GET_CR(PMV);
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CASE_GET_CR(CMCV);
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CASE_GET_CR(LRR0);
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CASE_GET_CR(LRR1);
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default:
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printk(KERN_CRIT "wrong_getreg %d\n", regnum);
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break;
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}
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return res;
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}
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#define CASE_SET_REG(id) \
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case _IA64_REG_ ## id: \
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ia64_native_setreg(_IA64_REG_ ## id, val); \
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break;
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#define CASE_SET_AR(id) CASE_SET_REG(AR_ ## id)
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#define CASE_SET_CR(id) CASE_SET_REG(CR_ ## id)
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void
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ia64_native_setreg_func(int regnum, unsigned long val)
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{
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switch (regnum) {
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case _IA64_REG_PSR_L:
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ia64_native_setreg(_IA64_REG_PSR_L, val);
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ia64_dv_serialize_data();
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break;
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CASE_SET_REG(SP);
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CASE_SET_REG(GP);
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CASE_SET_AR(KR0);
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CASE_SET_AR(KR1);
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CASE_SET_AR(KR2);
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CASE_SET_AR(KR3);
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CASE_SET_AR(KR4);
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CASE_SET_AR(KR5);
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CASE_SET_AR(KR6);
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CASE_SET_AR(KR7);
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CASE_SET_AR(RSC);
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CASE_SET_AR(BSP);
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CASE_SET_AR(BSPSTORE);
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CASE_SET_AR(RNAT);
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CASE_SET_AR(FCR);
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CASE_SET_AR(EFLAG);
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CASE_SET_AR(CSD);
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CASE_SET_AR(SSD);
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CASE_SET_AR(CFLAG);
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CASE_SET_AR(FSR);
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CASE_SET_AR(FIR);
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CASE_SET_AR(FDR);
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CASE_SET_AR(CCV);
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CASE_SET_AR(UNAT);
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CASE_SET_AR(FPSR);
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CASE_SET_AR(ITC);
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CASE_SET_AR(PFS);
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CASE_SET_AR(LC);
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CASE_SET_AR(EC);
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CASE_SET_CR(DCR);
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CASE_SET_CR(ITM);
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CASE_SET_CR(IVA);
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CASE_SET_CR(PTA);
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CASE_SET_CR(IPSR);
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CASE_SET_CR(ISR);
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CASE_SET_CR(IIP);
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CASE_SET_CR(IFA);
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CASE_SET_CR(ITIR);
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CASE_SET_CR(IIPA);
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CASE_SET_CR(IFS);
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CASE_SET_CR(IIM);
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CASE_SET_CR(IHA);
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CASE_SET_CR(LID);
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CASE_SET_CR(IVR);
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CASE_SET_CR(TPR);
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CASE_SET_CR(EOI);
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CASE_SET_CR(IRR0);
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CASE_SET_CR(IRR1);
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CASE_SET_CR(IRR2);
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CASE_SET_CR(IRR3);
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CASE_SET_CR(ITV);
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CASE_SET_CR(PMV);
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CASE_SET_CR(CMCV);
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CASE_SET_CR(LRR0);
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CASE_SET_CR(LRR1);
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default:
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printk(KERN_CRIT "wrong setreg %d\n", regnum);
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break;
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}
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}
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struct pv_cpu_ops pv_cpu_ops = {
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.fc = ia64_native_fc_func,
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.thash = ia64_native_thash_func,
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.get_cpuid = ia64_native_get_cpuid_func,
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.get_pmd = ia64_native_get_pmd_func,
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.ptcga = ia64_native_ptcga_func,
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.get_rr = ia64_native_get_rr_func,
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.set_rr = ia64_native_set_rr_func,
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.set_rr0_to_rr4 = ia64_native_set_rr0_to_rr4_func,
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.ssm_i = ia64_native_ssm_i_func,
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.getreg = ia64_native_getreg_func,
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.setreg = ia64_native_setreg_func,
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.rsm_i = ia64_native_rsm_i_func,
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.get_psr_i = ia64_native_get_psr_i_func,
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.intrin_local_irq_restore
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= ia64_native_intrin_local_irq_restore_func,
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};
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EXPORT_SYMBOL(pv_cpu_ops);
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/******************************************************************************
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* replacement of hand written assembly codes.
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*/
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void
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paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch)
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{
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extern unsigned long paravirt_switch_to_targ;
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extern unsigned long paravirt_leave_syscall_targ;
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extern unsigned long paravirt_work_processed_syscall_targ;
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extern unsigned long paravirt_leave_kernel_targ;
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paravirt_switch_to_targ = cpu_asm_switch->switch_to;
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paravirt_leave_syscall_targ = cpu_asm_switch->leave_syscall;
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paravirt_work_processed_syscall_targ =
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cpu_asm_switch->work_processed_syscall;
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paravirt_leave_kernel_targ = cpu_asm_switch->leave_kernel;
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}
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/***************************************************************************
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* pv_iosapic_ops
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* iosapic read/write hooks.
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*/
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static unsigned int
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ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
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{
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return __ia64_native_iosapic_read(iosapic, reg);
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}
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static void
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ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
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{
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__ia64_native_iosapic_write(iosapic, reg, val);
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}
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struct pv_iosapic_ops pv_iosapic_ops = {
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.pcat_compat_init = ia64_native_iosapic_pcat_compat_init,
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.get_irq_chip = ia64_native_iosapic_get_irq_chip,
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.__read = ia64_native_iosapic_read,
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.__write = ia64_native_iosapic_write,
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};
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/***************************************************************************
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* pv_irq_ops
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* irq operations
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*/
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struct pv_irq_ops pv_irq_ops = {
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.register_ipi = ia64_native_register_ipi,
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.assign_irq_vector = ia64_native_assign_irq_vector,
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.free_irq_vector = ia64_native_free_irq_vector,
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.register_percpu_irq = ia64_native_register_percpu_irq,
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.resend_irq = ia64_native_resend_irq,
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};
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