Oskar Schirmer 85922e54a3 arm: tcc8k: Choose PLL settings conforming to board layout ... The evaluation board is driven with 1.2V core voltage, so system clock must not exceed 192 MHz, bus clock must not exceed 110 MHz. Choose appropriate values and set DTCMWAIT accordingly. Adapt UART setting to avoid console log interruption and wait for the specified locking time of 300us to pass. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2011-03-11 10:06:05 +01:00
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board-tcc8000-sdk.c	arm: tcc8k: Choose PLL settings conforming to board layout	2011-03-11 10:06:05 +01:00
clock.c	ARM: 6483/1: arm & sh: factorised duplicated clkdev.c	2010-11-26 10:51:04 +00:00
common.h	ARM: Add common platform devices for TCC8xxx SoCs	2010-09-17 21:55:09 +02:00
devices.c	ARM: Add common platform devices for TCC8xxx SoCs	2010-09-17 21:55:09 +02:00
io.c	ARM: Basic IO mappings for mach-tcc8k	2010-09-17 21:55:08 +02:00
irq.c	ARM: tcc8k: irq_data conversion.	2011-01-13 17:19:03 +01:00
Kconfig	ARM: Add board support for Telechips TCC8000-SDK board	2010-09-17 21:55:09 +02:00
Makefile	ARM: Add board support for Telechips TCC8000-SDK board	2010-09-17 21:55:09 +02:00
Makefile.boot	ARM: Add board support for Telechips TCC8000-SDK board	2010-09-17 21:55:09 +02:00
time.c	ARM: tcc8k: update clock source registration	2010-12-22 22:44:37 +00:00