84be4ae2c0
This branch converts the MXS Freescale platform to use irqdomains and sparse IRQ, in preparation for DT probing and multiplatform kernels. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaiKwAAoJEIwa5zzehBx32FQP/0wZ5YZ4XMsCZRlXkzixc+/K uJa8+1vj4M861/4Q5/QXxbW/lOamxM5djvbG8/zLyl05RmQ5zV8UggDFIRSy9Yrr UlCwQK2co30HGlNK9NsbSiMadEaDVw9KitW4hssaqIPVDKR0KAOY0P4lDHDDFxUr /ES6Hl9GL5pGnAKrnxgU/amdHNTWkeW3YD30l00+v+EJd+65nXecN+iSZWleiZyC tV9cxwBgSZIwYAy7rJoNyOaZyEO8xPpewUGFgGFLUYEUggan9MKtMH7FQZstQ/YY hVSsqc05FYecdviuaoGJmmzWddihMBo2hNLUZTt5b+VDdw/mOGl0WV9aAiYOSlOY z/npwgWA8TP74MvtTuoy6BRQgNL7a2B4/h35ZeQ37bQG6AuQmcFvSxg4oiuyWQJL OL40FGANx7e2KK2gVEzpA7CVA69v/lh8CGD/xYdxsO+/o/F48j2cdPdtsQrCh3Gq MUV4e89avp1UVt5t5186snGmP990y/5rxOfbF+z7n1iU4zt2Dc2+k0H65UAiNpeG xHwJP20pRmroBRQiuwQABasSUNO6HL98/ZDQvFRdDj/xBQQt1/uGetDKLGk+i+tW T6HQIHT70iy7Xds0ANbd1K1uurUoYD33pB2KwgHjib9C0fy0ChEYs5NGemkUew22 1iB6u0nTSrPnMXVg0M0e =wVa3 -----END PGP SIGNATURE----- Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc-specific updates, take 2 from Olof Johansson: "This branch converts the MXS Freescale platform to use irqdomains and sparse IRQ, in preparation for DT probing and multiplatform kernels." * tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: mxs: remove mach/irqs.h ARM: mxs: select SPARSE_IRQ ARM: mxs: adopt irq_domain support for icoll driver ARM: mxs: select MULTI_IRQ_HANDLER ARM: mxs: retrieve timer irq from device tree gpio/mxs: adopt irq_domain support for mxs gpio driver
465 lines
11 KiB
Text
465 lines
11 KiB
Text
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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interrupt-parent = <&icoll>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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serial0 = &auart0;
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serial1 = &auart1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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apb@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x80000>;
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ranges;
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apbh@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x40000>;
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ranges;
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icoll: interrupt-controller@80000000 {
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compatible = "fsl,imx23-icoll", "fsl,icoll";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x80000000 0x2000>;
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};
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dma-apbh@80004000 {
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compatible = "fsl,imx23-dma-apbh";
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reg = <0x80004000 0x2000>;
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clocks = <&clks 15>;
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};
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ecc@80008000 {
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reg = <0x80008000 0x2000>;
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status = "disabled";
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};
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gpmi-nand@8000c000 {
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compatible = "fsl,imx23-gpmi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
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reg-names = "gpmi-nand", "bch";
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interrupts = <13>, <56>;
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interrupt-names = "gpmi-dma", "bch";
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clocks = <&clks 34>;
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fsl,gpmi-dma-channel = <4>;
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status = "disabled";
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};
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ssp0: ssp@80010000 {
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reg = <0x80010000 0x2000>;
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interrupts = <15 14>;
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clocks = <&clks 33>;
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fsl,ssp-dma-channel = <1>;
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status = "disabled";
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};
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etm@80014000 {
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reg = <0x80014000 0x2000>;
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status = "disabled";
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};
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pinctrl@80018000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx23-pinctrl", "simple-bus";
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reg = <0x80018000 0x2000>;
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gpio0: gpio@0 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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interrupts = <16>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio1: gpio@1 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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interrupts = <17>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@2 {
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compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
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interrupts = <18>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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duart_pins_a: duart@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x11a2 /* MX23_PAD_PWM0__DUART_RX */
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0x11b2 /* MX23_PAD_PWM1__DUART_TX */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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auart0_pins_a: auart0@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
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0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
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0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
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0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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auart0_2pins_a: auart0-2pins@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
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0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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gpmi_pins_a: gpmi-nand@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
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0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
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0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
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0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
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0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
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0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
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0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
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0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
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0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
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0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
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0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
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0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
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0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
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0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
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0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
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0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
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0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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gpmi_pins_fixup: gpmi-pins-fixup {
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fsl,pinmux-ids = <
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0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
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0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
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0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
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>;
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fsl,drive-strength = <2>;
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};
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mmc0_4bit_pins_a: mmc0-4bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
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0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
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0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
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0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
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0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
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0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
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>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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mmc0_8bit_pins_a: mmc0-8bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
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0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
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0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
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0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
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0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
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0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
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0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
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0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
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0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
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0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
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0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
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>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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mmc0_pins_fixup: mmc0-pins-fixup {
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fsl,pinmux-ids = <
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0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
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0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
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>;
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fsl,pull-up = <0>;
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};
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pwm2_pins_a: pwm2@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x11c0 /* MX23_PAD_PWM2__PWM2 */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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lcdif_24bit_pins_a: lcdif-24bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
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0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
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0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
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0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
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0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
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0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
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0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
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0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
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0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
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0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
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0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
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0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
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0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
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0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
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0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
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0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
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0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
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0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
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0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
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0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
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0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
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0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
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0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
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0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
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0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
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0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
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0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
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0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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};
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digctl@8001c000 {
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reg = <0x8001c000 2000>;
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status = "disabled";
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};
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emi@80020000 {
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reg = <0x80020000 0x2000>;
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status = "disabled";
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};
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dma-apbx@80024000 {
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compatible = "fsl,imx23-dma-apbx";
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reg = <0x80024000 0x2000>;
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clocks = <&clks 16>;
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};
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dcp@80028000 {
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reg = <0x80028000 0x2000>;
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status = "disabled";
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};
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pxp@8002a000 {
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reg = <0x8002a000 0x2000>;
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status = "disabled";
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};
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ocotp@8002c000 {
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reg = <0x8002c000 0x2000>;
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status = "disabled";
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};
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axi-ahb@8002e000 {
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reg = <0x8002e000 0x2000>;
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status = "disabled";
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};
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lcdif@80030000 {
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compatible = "fsl,imx23-lcdif";
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reg = <0x80030000 2000>;
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interrupts = <46 45>;
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clocks = <&clks 38>;
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status = "disabled";
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};
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ssp1: ssp@80034000 {
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reg = <0x80034000 0x2000>;
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interrupts = <2 20>;
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clocks = <&clks 33>;
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fsl,ssp-dma-channel = <2>;
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status = "disabled";
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};
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tvenc@80038000 {
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reg = <0x80038000 0x2000>;
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status = "disabled";
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};
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};
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apbx@80040000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80040000 0x40000>;
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ranges;
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clks: clkctrl@80040000 {
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compatible = "fsl,imx23-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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};
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saif0: saif@80042000 {
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reg = <0x80042000 0x2000>;
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status = "disabled";
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};
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power@80044000 {
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reg = <0x80044000 0x2000>;
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status = "disabled";
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};
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saif1: saif@80046000 {
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reg = <0x80046000 0x2000>;
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status = "disabled";
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};
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audio-out@80048000 {
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reg = <0x80048000 0x2000>;
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status = "disabled";
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};
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audio-in@8004c000 {
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reg = <0x8004c000 0x2000>;
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status = "disabled";
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};
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lradc@80050000 {
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reg = <0x80050000 0x2000>;
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status = "disabled";
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};
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spdif@80054000 {
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reg = <0x80054000 2000>;
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status = "disabled";
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};
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i2c@80058000 {
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reg = <0x80058000 0x2000>;
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status = "disabled";
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};
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rtc@8005c000 {
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compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
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reg = <0x8005c000 0x2000>;
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interrupts = <22>;
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};
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pwm: pwm@80064000 {
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compatible = "fsl,imx23-pwm";
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reg = <0x80064000 0x2000>;
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clocks = <&clks 30>;
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#pwm-cells = <2>;
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fsl,pwm-number = <5>;
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status = "disabled";
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};
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timrot@80068000 {
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compatible = "fsl,imx23-timrot", "fsl,timrot";
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reg = <0x80068000 0x2000>;
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interrupts = <28 29 30 31>;
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};
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auart0: serial@8006c000 {
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compatible = "fsl,imx23-auart";
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reg = <0x8006c000 0x2000>;
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interrupts = <24 25 23>;
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clocks = <&clks 32>;
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status = "disabled";
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};
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auart1: serial@8006e000 {
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compatible = "fsl,imx23-auart";
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reg = <0x8006e000 0x2000>;
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interrupts = <59 60 58>;
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clocks = <&clks 32>;
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status = "disabled";
|
|
};
|
|
|
|
duart: serial@80070000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x80070000 0x2000>;
|
|
interrupts = <0>;
|
|
clocks = <&clks 32>, <&clks 16>;
|
|
clock-names = "uart", "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbphy0: usbphy@8007c000 {
|
|
compatible = "fsl,imx23-usbphy";
|
|
reg = <0x8007c000 0x2000>;
|
|
clocks = <&clks 41>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
ahb@80080000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80080000 0x80000>;
|
|
ranges;
|
|
|
|
usb0: usb@80080000 {
|
|
compatible = "fsl,imx23-usb", "fsl,imx27-usb";
|
|
reg = <0x80080000 0x40000>;
|
|
interrupts = <11>;
|
|
fsl,usbphy = <&usbphy0>;
|
|
clocks = <&clks 40>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|