8323444b5d
Pentium III and Core Solo/Duo CPUs have an erratum " Page with PAT set to WC while associated MTRR is UC may consolidate to UC " which can result in WC setting in PAT to be ineffective. We will disable PAT on such CPUs, so that we can continue to use MTRR WC setting. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
83 lines
1.7 KiB
C
83 lines
1.7 KiB
C
/*
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* Routines to indentify additional cpu features that are scattered in
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* cpuid space.
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*/
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#include <linux/cpu.h>
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#include <asm/pat.h>
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#include <asm/processor.h>
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struct cpuid_bit {
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u16 feature;
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u8 reg;
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u8 bit;
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u32 level;
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};
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enum cpuid_regs {
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CR_EAX = 0,
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CR_ECX,
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CR_EDX,
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CR_EBX
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};
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void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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{
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u32 max_level;
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u32 regs[4];
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const struct cpuid_bit *cb;
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static const struct cpuid_bit cpuid_bits[] = {
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{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
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{ 0, 0, 0, 0 }
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};
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for (cb = cpuid_bits; cb->feature; cb++) {
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/* Verify that the level is valid */
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max_level = cpuid_eax(cb->level & 0xffff0000);
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if (max_level < cb->level ||
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max_level > (cb->level | 0xffff))
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continue;
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cpuid(cb->level, ®s[CR_EAX], ®s[CR_EBX],
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®s[CR_ECX], ®s[CR_EDX]);
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if (regs[cb->reg] & (1 << cb->bit))
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set_cpu_cap(c, cb->feature);
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}
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}
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#ifdef CONFIG_X86_PAT
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void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
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{
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if (!cpu_has_pat)
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pat_disable("PAT not supported by CPU.");
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switch (c->x86_vendor) {
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case X86_VENDOR_INTEL:
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/*
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* There is a known erratum on Pentium III and Core Solo
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* and Core Duo CPUs.
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* " Page with PAT set to WC while associated MTRR is UC
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* may consolidate to UC "
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* Because of this erratum, it is better to stick with
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* setting WC in MTRR rather than using PAT on these CPUs.
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*
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* Enable PAT WC only on P4, Core 2 or later CPUs.
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*/
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if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
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return;
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pat_disable("PAT WC disabled due to known CPU erratum.");
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return;
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case X86_VENDOR_AMD:
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case X86_VENDOR_CENTAUR:
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case X86_VENDOR_TRANSMETA:
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return;
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}
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pat_disable("PAT disabled. Not yet verified on this CPU type.");
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}
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#endif
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