e16415313c
Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/*
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* IMX pinmux core definitions
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* Copyright (C) 2012 Linaro Ltd.
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*
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* Author: Dong Aisheng <dong.aisheng@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DRIVERS_PINCTRL_IMX_H
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#define __DRIVERS_PINCTRL_IMX_H
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struct platform_device;
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/**
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* struct imx_pin_group - describes an IMX pin group
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* @name: the name of this specific pin group
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* @pins: an array of discrete physical pins used in this group, taken
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* from the driver-local pin enumeration space
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* @npins: the number of pins in this group array, i.e. the number of
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* elements in .pins so we can iterate over that array
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* @mux_mode: the mux mode for each pin in this group. The size of this
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* array is the same as pins.
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* @input_reg: select input register offset for this mux if any
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* 0 if no select input setting needed.
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* @input_val: the select input value for each pin in this group. The size of
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* this array is the same as pins.
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* @configs: the config for each pin in this group. The size of this
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* array is the same as pins.
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*/
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struct imx_pin_group {
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const char *name;
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unsigned int *pins;
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unsigned npins;
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unsigned int *mux_mode;
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u16 *input_reg;
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unsigned int *input_val;
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unsigned long *configs;
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};
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/**
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* struct imx_pmx_func - describes IMX pinmux functions
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* @name: the name of this specific function
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* @groups: corresponding pin groups
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* @num_groups: the number of groups
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*/
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struct imx_pmx_func {
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const char *name;
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const char **groups;
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unsigned num_groups;
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};
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/**
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* struct imx_pin_reg - describe a pin reg map
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* @mux_reg: mux register offset
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* @conf_reg: config register offset
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*/
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struct imx_pin_reg {
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u16 mux_reg;
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u16 conf_reg;
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};
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struct imx_pinctrl_soc_info {
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struct device *dev;
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const struct pinctrl_pin_desc *pins;
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unsigned int npins;
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struct imx_pin_reg *pin_regs;
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struct imx_pin_group *groups;
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unsigned int ngroups;
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struct imx_pmx_func *functions;
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unsigned int nfunctions;
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};
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#define NO_MUX 0x0
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#define NO_PAD 0x0
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#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
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#define PAD_CTL_MASK(len) ((1 << len) - 1)
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#define IMX_MUX_MASK 0x7
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#define IOMUXC_CONFIG_SION (0x1 << 4)
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int imx_pinctrl_probe(struct platform_device *pdev,
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struct imx_pinctrl_soc_info *info);
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int imx_pinctrl_remove(struct platform_device *pdev);
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#endif /* __DRIVERS_PINCTRL_IMX_H */
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