Techwizz/kernel-fxtec-pro1x
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kernel-fxtec-pro1x/drivers/soc/tegra/fuse
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Thierry Reding 1dad36cdd5 soc/tegra: fuse: Add spare bit offset for Tegra210 
The offset of the first spare bit register on Tegra210 is 0x380, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:31 +02:00
..
fuse-tegra.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
fuse-tegra20.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
fuse-tegra30.c soc/tegra: fuse: Add spare bit offset for Tegra210 2015-07-16 10:38:31 +02:00
fuse.h soc/tegra: fuse: Add Tegra210 support 2015-07-16 10:38:29 +02:00
Makefile soc/tegra: fuse: Add Tegra210 support 2015-07-16 10:38:29 +02:00
speedo-tegra20.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
speedo-tegra30.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
speedo-tegra114.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
speedo-tegra124.c soc/tegra: fuse: Rename core_* to soc_* 2015-07-16 10:38:29 +02:00
speedo-tegra210.c soc/tegra: fuse: Add Tegra210 support 2015-07-16 10:38:29 +02:00
tegra-apbmisc.c soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers 2015-07-16 10:38:28 +02:00