3cdf4ad963
Currently, the rtc-sa1100 and rtc-pxa drivers co-exist as rtc-pxa has a superset of functionality. Having 2 drivers sharing the same memory resource is not allowed by the driver model if resources are properly declared. This problem was avoided by not adding memory resources to the SA1100 RTC driver, but that prevents clean-up of the SA1100 driver. This commit converts the PXA RTC to use the exported SA1100 RTC functions. Now the sa1100-rtc and pxa-rtc devices are mutually exclusive, so we must remove the sa1100-rtc from pxa27x and pxa3xx. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Russell King <linux@arm.linux.org.uk> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: rtc-linux@googlegroups.com Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
321 lines
6.8 KiB
C
321 lines
6.8 KiB
C
/*
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* linux/arch/arm/mach-pxa/pxa27x.c
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*
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* Author: Nicolas Pitre
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* Created: Nov 05, 2002
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* Copyright: MontaVista Software Inc.
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*
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* Code specific to PXA27x aka Bulverde.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/gpio-pxa.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <linux/platform_device.h>
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#include <linux/syscore_ops.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/i2c/pxa-i2c.h>
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#include <asm/mach/map.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/suspend.h>
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#include <mach/irqs.h>
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#include <mach/pxa27x.h>
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#include <mach/reset.h>
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#include <linux/platform_data/usb-ohci-pxa27x.h>
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#include <mach/pm.h>
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#include <mach/dma.h>
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#include <mach/smemc.h>
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#include "generic.h"
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#include "devices.h"
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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void pxa27x_clear_otgph(void)
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{
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if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
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PSSR |= PSSR_OTGPH;
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}
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EXPORT_SYMBOL(pxa27x_clear_otgph);
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static unsigned long ac97_reset_config[] = {
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GPIO113_AC97_nRESET_GPIO_HIGH,
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GPIO113_AC97_nRESET,
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GPIO95_AC97_nRESET_GPIO_HIGH,
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GPIO95_AC97_nRESET,
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};
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void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
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{
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/*
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* This helper function is used to work around a bug in the pxa27x's
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* ac97 controller during a warm reset. The configuration of the
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* reset_gpio is changed as follows:
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* to_gpio == true: configured to generic output gpio and driven high
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* to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
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*/
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if (reset_gpio == 113)
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pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
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&ac97_reset_config[1], 1);
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if (reset_gpio == 95)
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pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
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&ac97_reset_config[3], 1);
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}
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EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
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#ifdef CONFIG_PM
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#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
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#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
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/*
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* allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
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*/
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static unsigned int pwrmode = PWRMODE_SLEEP;
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int __init pxa27x_set_pwrmode(unsigned int mode)
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{
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switch (mode) {
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case PWRMODE_SLEEP:
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case PWRMODE_DEEPSLEEP:
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pwrmode = mode;
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return 0;
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}
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return -EINVAL;
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}
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/*
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* List of global PXA peripheral registers to preserve.
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* More ones like CP and general purpose register values are preserved
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* with the stack pointer in sleep.S.
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*/
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enum {
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SLEEP_SAVE_PSTR,
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SLEEP_SAVE_MDREFR,
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SLEEP_SAVE_PCFR,
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SLEEP_SAVE_COUNT
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};
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void pxa27x_cpu_pm_save(unsigned long *sleep_save)
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{
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sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
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SAVE(PCFR);
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SAVE(PSTR);
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}
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void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
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{
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__raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
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RESTORE(PCFR);
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PSSR = PSSR_RDH | PSSR_PH;
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RESTORE(PSTR);
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}
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void pxa27x_cpu_pm_enter(suspend_state_t state)
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{
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extern void pxa_cpu_standby(void);
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#ifndef CONFIG_IWMMXT
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u64 acc0;
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asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0));
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#endif
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/* ensure voltage-change sequencer not initiated, which hangs */
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PCFR &= ~PCFR_FVC;
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/* Clear edge-detect status register. */
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PEDR = 0xDF12FE1B;
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/* Clear reset status */
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RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
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switch (state) {
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case PM_SUSPEND_STANDBY:
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pxa_cpu_standby();
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break;
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case PM_SUSPEND_MEM:
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cpu_suspend(pwrmode, pxa27x_finish_suspend);
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#ifndef CONFIG_IWMMXT
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asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0));
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#endif
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break;
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}
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}
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static int pxa27x_cpu_pm_valid(suspend_state_t state)
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{
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return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
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}
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static int pxa27x_cpu_pm_prepare(void)
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{
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/* set resume return address */
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PSPR = virt_to_phys(cpu_resume);
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return 0;
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}
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static void pxa27x_cpu_pm_finish(void)
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{
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/* ensure not to come back here if it wasn't intended */
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PSPR = 0;
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}
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static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
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.save_count = SLEEP_SAVE_COUNT,
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.save = pxa27x_cpu_pm_save,
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.restore = pxa27x_cpu_pm_restore,
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.valid = pxa27x_cpu_pm_valid,
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.enter = pxa27x_cpu_pm_enter,
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.prepare = pxa27x_cpu_pm_prepare,
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.finish = pxa27x_cpu_pm_finish,
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};
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static void __init pxa27x_init_pm(void)
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{
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pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
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}
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#else
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static inline void pxa27x_init_pm(void) {}
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#endif
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/* PXA27x: Various gpios can issue wakeup events. This logic only
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* handles the simple cases, not the WEMUX2 and WEMUX3 options
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*/
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static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
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{
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int gpio = pxa_irq_to_gpio(d->irq);
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uint32_t mask;
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if (gpio >= 0 && gpio < 128)
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return gpio_set_wake(gpio, on);
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if (d->irq == IRQ_KEYPAD)
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return keypad_set_wake(on);
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switch (d->irq) {
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case IRQ_RTCAlrm:
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mask = PWER_RTC;
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break;
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case IRQ_USB:
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mask = 1u << 26;
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break;
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default:
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return -EINVAL;
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}
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if (on)
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PWER |= mask;
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else
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PWER &=~mask;
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return 0;
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}
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void __init pxa27x_init_irq(void)
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{
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pxa_init_irq(34, pxa27x_set_wake);
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}
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void __init pxa27x_dt_init_irq(void)
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{
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if (IS_ENABLED(CONFIG_OF))
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pxa_dt_irq_init(pxa27x_set_wake);
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}
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static struct map_desc pxa27x_io_desc[] __initdata = {
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{ /* Mem Ctl */
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.virtual = (unsigned long)SMEMC_VIRT,
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.pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
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.length = SMEMC_SIZE,
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.type = MT_DEVICE
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}, { /* UNCACHED_PHYS_0 */
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.virtual = UNCACHED_PHYS_0,
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.pfn = __phys_to_pfn(0x00000000),
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.length = UNCACHED_PHYS_0_SIZE,
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.type = MT_DEVICE
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},
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};
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void __init pxa27x_map_io(void)
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{
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pxa_map_io();
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iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
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pxa27x_get_clk_frequency_khz(1);
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}
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/*
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* device registration specific to PXA27x.
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*/
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void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
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{
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local_irq_disable();
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PCFR |= PCFR_PI2CEN;
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local_irq_enable();
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pxa_register_device(&pxa27x_device_i2c_power, info);
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}
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static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
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.irq_base = PXA_GPIO_TO_IRQ(0),
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.gpio_set_wake = gpio_set_wake,
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};
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static struct platform_device *devices[] __initdata = {
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&pxa27x_device_udc,
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&pxa_device_pmu,
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&pxa_device_i2s,
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&pxa_device_asoc_ssp1,
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&pxa_device_asoc_ssp2,
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&pxa_device_asoc_ssp3,
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&pxa_device_asoc_platform,
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&pxa_device_rtc,
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&pxa27x_device_ssp1,
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&pxa27x_device_ssp2,
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&pxa27x_device_ssp3,
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&pxa27x_device_pwm0,
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&pxa27x_device_pwm1,
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};
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static int __init pxa27x_init(void)
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{
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int ret = 0;
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if (cpu_is_pxa27x()) {
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reset_status = RCSR;
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if ((ret = pxa_init_dma(IRQ_DMA, 32)))
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return ret;
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pxa27x_init_pm();
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register_syscore_ops(&pxa_irq_syscore_ops);
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register_syscore_ops(&pxa2xx_mfp_syscore_ops);
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if (!of_have_populated_dt()) {
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pxa_register_device(&pxa27x_device_gpio,
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&pxa27x_gpio_info);
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pxa2xx_set_dmac_info(32);
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ret = platform_add_devices(devices,
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ARRAY_SIZE(devices));
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}
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}
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return ret;
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}
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postcore_initcall(pxa27x_init);
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