70d21cdeef
The "typename" field was obsoleted by the "name" field. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
91 lines
2.4 KiB
C
91 lines
2.4 KiB
C
/*
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* Copyright 2002 Momentum Computer
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* Author: mdharm@momenco.com
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*
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* arch/mips/momentum/ocelot_c/uart-irq.c
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* Interrupt routines for UARTs. Interrupt numbers are assigned from
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* 80 to 81 (2 interrupt sources).
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include "ocelot_c_fpga.h"
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static inline int ls1bit8(unsigned int x)
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{
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int b = 7, s;
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s = 4; if (((unsigned char)(x << 4)) == 0) s = 0; b -= s; x <<= s;
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s = 2; if (((unsigned char)(x << 2)) == 0) s = 0; b -= s; x <<= s;
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s = 1; if (((unsigned char)(x << 1)) == 0) s = 0; b -= s;
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return b;
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}
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/* mask off an interrupt -- 0 is enable, 1 is disable */
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static inline void mask_uart_irq(unsigned int irq)
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{
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uint8_t value;
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value = OCELOT_FPGA_READ(UART_INTMASK);
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value |= 1 << (irq - 74);
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OCELOT_FPGA_WRITE(value, UART_INTMASK);
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/* read the value back to assure that it's really been written */
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value = OCELOT_FPGA_READ(UART_INTMASK);
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}
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/* unmask an interrupt -- 0 is enable, 1 is disable */
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static inline void unmask_uart_irq(unsigned int irq)
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{
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uint8_t value;
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value = OCELOT_FPGA_READ(UART_INTMASK);
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value &= ~(1 << (irq - 74));
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OCELOT_FPGA_WRITE(value, UART_INTMASK);
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/* read the value back to assure that it's really been written */
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value = OCELOT_FPGA_READ(UART_INTMASK);
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}
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/*
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* Interrupt handler for interrupts coming from the FPGA chip.
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*/
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void ll_uart_irq(void)
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{
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unsigned int irq_src, irq_mask;
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/* read the interrupt status registers */
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irq_src = OCELOT_FPGA_READ(UART_INTSTAT);
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irq_mask = OCELOT_FPGA_READ(UART_INTMASK);
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/* mask for just the interrupts we want */
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irq_src &= ~irq_mask;
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do_IRQ(ls1bit8(irq_src) + 74);
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}
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struct irq_chip uart_irq_type = {
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.name = "UART/FPGA",
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.ack = mask_uart_irq,
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.mask = mask_uart_irq,
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.mask_ack = mask_uart_irq,
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.unmask = unmask_uart_irq,
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};
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void uart_irq_init(void)
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{
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set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq);
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set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq);
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}
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