823e7e8c6e
Non real IOMMU implemenations (which doesn't do virtual mappings, e.g. swiotlb, pci-nommu, etc) need to use proper gfp flags and dma_mask to allocate pages in their own dma_alloc_coherent() (allocated page need to be suitable for device's coherent_dma_mask). This patch makes dma_alloc_coherent do this job so that IOMMUs don't need to take care of it any more. Real IOMMU implemenataions can simply ignore the gfp flags. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
131 lines
3.3 KiB
C
131 lines
3.3 KiB
C
/* Fallback functions when the main IOMMU code is not compiled in. This
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code is roughly equivalent to i386. */
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include <asm/iommu.h>
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#include <asm/processor.h>
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#include <asm/dma.h>
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static int
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check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size)
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{
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if (hwdev && bus + size > *hwdev->dma_mask) {
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if (*hwdev->dma_mask >= DMA_32BIT_MASK)
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printk(KERN_ERR
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"nommu_%s: overflow %Lx+%zu of device mask %Lx\n",
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name, (long long)bus, size,
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(long long)*hwdev->dma_mask);
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return 0;
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}
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return 1;
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}
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static dma_addr_t
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nommu_map_single(struct device *hwdev, phys_addr_t paddr, size_t size,
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int direction)
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{
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dma_addr_t bus = paddr;
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WARN_ON(size == 0);
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if (!check_addr("map_single", hwdev, bus, size))
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return bad_dma_address;
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flush_write_buffers();
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return bus;
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}
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/* Map a set of buffers described by scatterlist in streaming
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* mode for DMA. This is the scatter-gather version of the
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* above pci_map_single interface. Here the scatter gather list
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* elements are each tagged with the appropriate dma address
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* and length. They are obtained via sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for pci_map_single are
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* the same here.
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*/
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static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
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int nents, int direction)
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{
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struct scatterlist *s;
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int i;
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WARN_ON(nents == 0 || sg[0].length == 0);
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for_each_sg(sg, s, nents, i) {
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BUG_ON(!sg_page(s));
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s->dma_address = sg_phys(s);
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if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
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return 0;
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s->dma_length = s->length;
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}
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flush_write_buffers();
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return nents;
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}
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static void *
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nommu_alloc_coherent(struct device *hwdev, size_t size,
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dma_addr_t *dma_addr, gfp_t gfp)
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{
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unsigned long dma_mask;
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int node;
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struct page *page;
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dma_mask = dma_alloc_coherent_mask(hwdev, gfp);
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gfp |= __GFP_ZERO;
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node = dev_to_node(hwdev);
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again:
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page = alloc_pages_node(node, gfp, get_order(size));
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if (!page)
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return NULL;
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if ((page_to_phys(page) + size > dma_mask) && !(gfp & GFP_DMA)) {
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free_pages((unsigned long)page_address(page), get_order(size));
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gfp |= GFP_DMA;
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goto again;
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}
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*dma_addr = page_to_phys(page);
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if (check_addr("alloc_coherent", hwdev, *dma_addr, size)) {
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flush_write_buffers();
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return page_address(page);
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}
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free_pages((unsigned long)page_address(page), get_order(size));
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return NULL;
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}
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static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr)
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{
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free_pages((unsigned long)vaddr, get_order(size));
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}
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struct dma_mapping_ops nommu_dma_ops = {
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.alloc_coherent = nommu_alloc_coherent,
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.free_coherent = nommu_free_coherent,
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.map_single = nommu_map_single,
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.map_sg = nommu_map_sg,
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.is_phys = 1,
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};
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void __init no_iommu_init(void)
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{
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if (dma_ops)
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return;
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force_iommu = 0; /* no HW IOMMU */
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dma_ops = &nommu_dma_ops;
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}
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