68fcfe7f82
Add support for DMA transfers on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1401/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ7420/JZ4740 DMA definitions
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __ASM_MACH_JZ4740_DMA_H__
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#define __ASM_MACH_JZ4740_DMA_H__
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struct jz4740_dma_chan;
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enum jz4740_dma_request_type {
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JZ4740_DMA_TYPE_AUTO_REQUEST = 8,
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JZ4740_DMA_TYPE_UART_TRANSMIT = 20,
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JZ4740_DMA_TYPE_UART_RECEIVE = 21,
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JZ4740_DMA_TYPE_SPI_TRANSMIT = 22,
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JZ4740_DMA_TYPE_SPI_RECEIVE = 23,
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JZ4740_DMA_TYPE_AIC_TRANSMIT = 24,
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JZ4740_DMA_TYPE_AIC_RECEIVE = 25,
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JZ4740_DMA_TYPE_MMC_TRANSMIT = 26,
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JZ4740_DMA_TYPE_MMC_RECEIVE = 27,
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JZ4740_DMA_TYPE_TCU = 28,
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JZ4740_DMA_TYPE_SADC = 29,
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JZ4740_DMA_TYPE_SLCD = 30,
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};
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enum jz4740_dma_width {
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JZ4740_DMA_WIDTH_32BIT = 0,
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JZ4740_DMA_WIDTH_8BIT = 1,
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JZ4740_DMA_WIDTH_16BIT = 2,
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};
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enum jz4740_dma_transfer_size {
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JZ4740_DMA_TRANSFER_SIZE_4BYTE = 0,
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JZ4740_DMA_TRANSFER_SIZE_1BYTE = 1,
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JZ4740_DMA_TRANSFER_SIZE_2BYTE = 2,
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JZ4740_DMA_TRANSFER_SIZE_16BYTE = 3,
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JZ4740_DMA_TRANSFER_SIZE_32BYTE = 4,
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};
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enum jz4740_dma_flags {
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JZ4740_DMA_SRC_AUTOINC = 0x2,
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JZ4740_DMA_DST_AUTOINC = 0x1,
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};
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enum jz4740_dma_mode {
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JZ4740_DMA_MODE_SINGLE = 0,
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JZ4740_DMA_MODE_BLOCK = 1,
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};
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struct jz4740_dma_config {
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enum jz4740_dma_width src_width;
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enum jz4740_dma_width dst_width;
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enum jz4740_dma_transfer_size transfer_size;
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enum jz4740_dma_request_type request_type;
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enum jz4740_dma_flags flags;
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enum jz4740_dma_mode mode;
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};
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typedef void (*jz4740_dma_complete_callback_t)(struct jz4740_dma_chan *, int, void *);
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struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name);
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void jz4740_dma_free(struct jz4740_dma_chan *dma);
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void jz4740_dma_configure(struct jz4740_dma_chan *dma,
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const struct jz4740_dma_config *config);
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void jz4740_dma_enable(struct jz4740_dma_chan *dma);
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void jz4740_dma_disable(struct jz4740_dma_chan *dma);
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void jz4740_dma_set_src_addr(struct jz4740_dma_chan *dma, dma_addr_t src);
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void jz4740_dma_set_dst_addr(struct jz4740_dma_chan *dma, dma_addr_t dst);
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void jz4740_dma_set_transfer_count(struct jz4740_dma_chan *dma, uint32_t count);
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uint32_t jz4740_dma_get_residue(const struct jz4740_dma_chan *dma);
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void jz4740_dma_set_complete_cb(struct jz4740_dma_chan *dma,
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jz4740_dma_complete_callback_t cb);
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#endif /* __ASM_JZ4740_DMA_H__ */
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