5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
1123 lines
26 KiB
C
1123 lines
26 KiB
C
/*
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* Copyright (c) 2008-2009 Nuvoton technology corporation.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation;version 2 of the License.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/mii.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/ethtool.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/gfp.h>
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#define DRV_MODULE_NAME "w90p910-emc"
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#define DRV_MODULE_VERSION "0.1"
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/* Ethernet MAC Registers */
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#define REG_CAMCMR 0x00
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#define REG_CAMEN 0x04
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#define REG_CAMM_BASE 0x08
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#define REG_CAML_BASE 0x0c
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#define REG_TXDLSA 0x88
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#define REG_RXDLSA 0x8C
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#define REG_MCMDR 0x90
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#define REG_MIID 0x94
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#define REG_MIIDA 0x98
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#define REG_FFTCR 0x9C
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#define REG_TSDR 0xa0
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#define REG_RSDR 0xa4
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#define REG_DMARFC 0xa8
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#define REG_MIEN 0xac
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#define REG_MISTA 0xb0
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#define REG_CTXDSA 0xcc
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#define REG_CTXBSA 0xd0
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#define REG_CRXDSA 0xd4
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#define REG_CRXBSA 0xd8
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/* mac controller bit */
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#define MCMDR_RXON 0x01
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#define MCMDR_ACP (0x01 << 3)
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#define MCMDR_SPCRC (0x01 << 5)
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#define MCMDR_TXON (0x01 << 8)
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#define MCMDR_FDUP (0x01 << 18)
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#define MCMDR_ENMDC (0x01 << 19)
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#define MCMDR_OPMOD (0x01 << 20)
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#define SWR (0x01 << 24)
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/* cam command regiser */
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#define CAMCMR_AUP 0x01
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#define CAMCMR_AMP (0x01 << 1)
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#define CAMCMR_ABP (0x01 << 2)
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#define CAMCMR_CCAM (0x01 << 3)
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#define CAMCMR_ECMP (0x01 << 4)
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#define CAM0EN 0x01
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/* mac mii controller bit */
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#define MDCCR (0x0a << 20)
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#define PHYAD (0x01 << 8)
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#define PHYWR (0x01 << 16)
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#define PHYBUSY (0x01 << 17)
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#define PHYPRESP (0x01 << 18)
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#define CAM_ENTRY_SIZE 0x08
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/* rx and tx status */
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#define TXDS_TXCP (0x01 << 19)
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#define RXDS_CRCE (0x01 << 17)
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#define RXDS_PTLE (0x01 << 19)
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#define RXDS_RXGD (0x01 << 20)
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#define RXDS_ALIE (0x01 << 21)
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#define RXDS_RP (0x01 << 22)
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/* mac interrupt status*/
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#define MISTA_EXDEF (0x01 << 19)
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#define MISTA_TXBERR (0x01 << 24)
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#define MISTA_TDU (0x01 << 23)
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#define MISTA_RDU (0x01 << 10)
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#define MISTA_RXBERR (0x01 << 11)
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#define ENSTART 0x01
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#define ENRXINTR 0x01
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#define ENRXGD (0x01 << 4)
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#define ENRXBERR (0x01 << 11)
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#define ENTXINTR (0x01 << 16)
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#define ENTXCP (0x01 << 18)
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#define ENTXABT (0x01 << 21)
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#define ENTXBERR (0x01 << 24)
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#define ENMDC (0x01 << 19)
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#define PHYBUSY (0x01 << 17)
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#define MDCCR_VAL 0xa00000
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/* rx and tx owner bit */
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#define RX_OWEN_DMA (0x01 << 31)
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#define RX_OWEN_CPU (~(0x03 << 30))
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#define TX_OWEN_DMA (0x01 << 31)
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#define TX_OWEN_CPU (~(0x01 << 31))
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/* tx frame desc controller bit */
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#define MACTXINTEN 0x04
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#define CRCMODE 0x02
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#define PADDINGMODE 0x01
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/* fftcr controller bit */
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#define TXTHD (0x03 << 8)
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#define BLENGTH (0x01 << 20)
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/* global setting for driver */
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#define RX_DESC_SIZE 50
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#define TX_DESC_SIZE 10
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#define MAX_RBUFF_SZ 0x600
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#define MAX_TBUFF_SZ 0x600
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#define TX_TIMEOUT 50
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#define DELAY 1000
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#define CAM0 0x0
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static int w90p910_mdio_read(struct net_device *dev, int phy_id, int reg);
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struct w90p910_rxbd {
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unsigned int sl;
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unsigned int buffer;
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unsigned int reserved;
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unsigned int next;
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};
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struct w90p910_txbd {
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unsigned int mode;
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unsigned int buffer;
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unsigned int sl;
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unsigned int next;
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};
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struct recv_pdesc {
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struct w90p910_rxbd desclist[RX_DESC_SIZE];
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char recv_buf[RX_DESC_SIZE][MAX_RBUFF_SZ];
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};
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struct tran_pdesc {
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struct w90p910_txbd desclist[TX_DESC_SIZE];
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char tran_buf[TX_DESC_SIZE][MAX_TBUFF_SZ];
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};
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struct w90p910_ether {
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struct recv_pdesc *rdesc;
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struct tran_pdesc *tdesc;
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dma_addr_t rdesc_phys;
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dma_addr_t tdesc_phys;
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struct net_device_stats stats;
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struct platform_device *pdev;
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struct resource *res;
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struct sk_buff *skb;
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struct clk *clk;
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struct clk *rmiiclk;
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struct mii_if_info mii;
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struct timer_list check_timer;
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void __iomem *reg;
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int rxirq;
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int txirq;
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unsigned int cur_tx;
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unsigned int cur_rx;
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unsigned int finish_tx;
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unsigned int rx_packets;
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unsigned int rx_bytes;
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unsigned int start_tx_ptr;
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unsigned int start_rx_ptr;
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unsigned int linkflag;
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};
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static void update_linkspeed_register(struct net_device *dev,
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unsigned int speed, unsigned int duplex)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = __raw_readl(ether->reg + REG_MCMDR);
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if (speed == SPEED_100) {
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/* 100 full/half duplex */
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if (duplex == DUPLEX_FULL) {
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val |= (MCMDR_OPMOD | MCMDR_FDUP);
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} else {
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val |= MCMDR_OPMOD;
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val &= ~MCMDR_FDUP;
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}
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} else {
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/* 10 full/half duplex */
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if (duplex == DUPLEX_FULL) {
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val |= MCMDR_FDUP;
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val &= ~MCMDR_OPMOD;
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} else {
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val &= ~(MCMDR_FDUP | MCMDR_OPMOD);
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}
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}
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__raw_writel(val, ether->reg + REG_MCMDR);
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}
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static void update_linkspeed(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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struct platform_device *pdev;
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unsigned int bmsr, bmcr, lpa, speed, duplex;
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pdev = ether->pdev;
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if (!mii_link_ok(ðer->mii)) {
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ether->linkflag = 0x0;
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netif_carrier_off(dev);
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dev_warn(&pdev->dev, "%s: Link down.\n", dev->name);
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return;
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}
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if (ether->linkflag == 1)
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return;
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bmsr = w90p910_mdio_read(dev, ether->mii.phy_id, MII_BMSR);
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bmcr = w90p910_mdio_read(dev, ether->mii.phy_id, MII_BMCR);
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if (bmcr & BMCR_ANENABLE) {
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if (!(bmsr & BMSR_ANEGCOMPLETE))
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return;
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lpa = w90p910_mdio_read(dev, ether->mii.phy_id, MII_LPA);
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if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF))
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speed = SPEED_100;
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else
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speed = SPEED_10;
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if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL))
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duplex = DUPLEX_FULL;
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else
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duplex = DUPLEX_HALF;
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} else {
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speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
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duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
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}
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update_linkspeed_register(dev, speed, duplex);
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dev_info(&pdev->dev, "%s: Link now %i-%s\n", dev->name, speed,
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(duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");
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ether->linkflag = 0x01;
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netif_carrier_on(dev);
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}
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static void w90p910_check_link(unsigned long dev_id)
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{
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struct net_device *dev = (struct net_device *) dev_id;
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struct w90p910_ether *ether = netdev_priv(dev);
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update_linkspeed(dev);
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mod_timer(ðer->check_timer, jiffies + msecs_to_jiffies(1000));
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}
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static void w90p910_write_cam(struct net_device *dev,
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unsigned int x, unsigned char *pval)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int msw, lsw;
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msw = (pval[0] << 24) | (pval[1] << 16) | (pval[2] << 8) | pval[3];
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lsw = (pval[4] << 24) | (pval[5] << 16);
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__raw_writel(lsw, ether->reg + REG_CAML_BASE + x * CAM_ENTRY_SIZE);
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__raw_writel(msw, ether->reg + REG_CAMM_BASE + x * CAM_ENTRY_SIZE);
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}
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static int w90p910_init_desc(struct net_device *dev)
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{
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struct w90p910_ether *ether;
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struct w90p910_txbd *tdesc;
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struct w90p910_rxbd *rdesc;
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struct platform_device *pdev;
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unsigned int i;
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ether = netdev_priv(dev);
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pdev = ether->pdev;
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ether->tdesc = (struct tran_pdesc *)
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dma_alloc_coherent(&pdev->dev, sizeof(struct tran_pdesc),
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ðer->tdesc_phys, GFP_KERNEL);
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if (!ether->tdesc) {
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dev_err(&pdev->dev, "Failed to allocate memory for tx desc\n");
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return -ENOMEM;
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}
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ether->rdesc = (struct recv_pdesc *)
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dma_alloc_coherent(&pdev->dev, sizeof(struct recv_pdesc),
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ðer->rdesc_phys, GFP_KERNEL);
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if (!ether->rdesc) {
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dev_err(&pdev->dev, "Failed to allocate memory for rx desc\n");
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dma_free_coherent(&pdev->dev, sizeof(struct tran_pdesc),
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ether->tdesc, ether->tdesc_phys);
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return -ENOMEM;
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}
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for (i = 0; i < TX_DESC_SIZE; i++) {
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unsigned int offset;
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tdesc = &(ether->tdesc->desclist[i]);
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if (i == TX_DESC_SIZE - 1)
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offset = offsetof(struct tran_pdesc, desclist[0]);
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else
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offset = offsetof(struct tran_pdesc, desclist[i + 1]);
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tdesc->next = ether->tdesc_phys + offset;
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tdesc->buffer = ether->tdesc_phys +
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offsetof(struct tran_pdesc, tran_buf[i]);
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tdesc->sl = 0;
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tdesc->mode = 0;
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}
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ether->start_tx_ptr = ether->tdesc_phys;
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for (i = 0; i < RX_DESC_SIZE; i++) {
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unsigned int offset;
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rdesc = &(ether->rdesc->desclist[i]);
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if (i == RX_DESC_SIZE - 1)
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offset = offsetof(struct recv_pdesc, desclist[0]);
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else
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offset = offsetof(struct recv_pdesc, desclist[i + 1]);
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rdesc->next = ether->rdesc_phys + offset;
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rdesc->sl = RX_OWEN_DMA;
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rdesc->buffer = ether->rdesc_phys +
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offsetof(struct recv_pdesc, recv_buf[i]);
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}
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ether->start_rx_ptr = ether->rdesc_phys;
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return 0;
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}
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static void w90p910_set_fifo_threshold(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = TXTHD | BLENGTH;
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__raw_writel(val, ether->reg + REG_FFTCR);
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}
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static void w90p910_return_default_idle(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = __raw_readl(ether->reg + REG_MCMDR);
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val |= SWR;
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__raw_writel(val, ether->reg + REG_MCMDR);
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}
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static void w90p910_trigger_rx(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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__raw_writel(ENSTART, ether->reg + REG_RSDR);
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}
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static void w90p910_trigger_tx(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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__raw_writel(ENSTART, ether->reg + REG_TSDR);
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}
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static void w90p910_enable_mac_interrupt(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = ENTXINTR | ENRXINTR | ENRXGD | ENTXCP;
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val |= ENTXBERR | ENRXBERR | ENTXABT;
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__raw_writel(val, ether->reg + REG_MIEN);
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}
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static void w90p910_get_and_clear_int(struct net_device *dev,
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unsigned int *val)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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*val = __raw_readl(ether->reg + REG_MISTA);
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__raw_writel(*val, ether->reg + REG_MISTA);
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}
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static void w90p910_set_global_maccmd(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = __raw_readl(ether->reg + REG_MCMDR);
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val |= MCMDR_SPCRC | MCMDR_ENMDC | MCMDR_ACP | ENMDC;
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__raw_writel(val, ether->reg + REG_MCMDR);
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}
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static void w90p910_enable_cam(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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w90p910_write_cam(dev, CAM0, dev->dev_addr);
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val = __raw_readl(ether->reg + REG_CAMEN);
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val |= CAM0EN;
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__raw_writel(val, ether->reg + REG_CAMEN);
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}
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static void w90p910_enable_cam_command(struct net_device *dev)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = CAMCMR_ECMP | CAMCMR_ABP | CAMCMR_AMP;
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__raw_writel(val, ether->reg + REG_CAMCMR);
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}
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static void w90p910_enable_tx(struct net_device *dev, unsigned int enable)
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{
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struct w90p910_ether *ether = netdev_priv(dev);
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unsigned int val;
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val = __raw_readl(ether->reg + REG_MCMDR);
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if (enable)
|
|
val |= MCMDR_TXON;
|
|
else
|
|
val &= ~MCMDR_TXON;
|
|
|
|
__raw_writel(val, ether->reg + REG_MCMDR);
|
|
}
|
|
|
|
static void w90p910_enable_rx(struct net_device *dev, unsigned int enable)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
unsigned int val;
|
|
|
|
val = __raw_readl(ether->reg + REG_MCMDR);
|
|
|
|
if (enable)
|
|
val |= MCMDR_RXON;
|
|
else
|
|
val &= ~MCMDR_RXON;
|
|
|
|
__raw_writel(val, ether->reg + REG_MCMDR);
|
|
}
|
|
|
|
static void w90p910_set_curdest(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
|
|
__raw_writel(ether->start_rx_ptr, ether->reg + REG_RXDLSA);
|
|
__raw_writel(ether->start_tx_ptr, ether->reg + REG_TXDLSA);
|
|
}
|
|
|
|
static void w90p910_reset_mac(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
|
|
w90p910_enable_tx(dev, 0);
|
|
w90p910_enable_rx(dev, 0);
|
|
w90p910_set_fifo_threshold(dev);
|
|
w90p910_return_default_idle(dev);
|
|
|
|
if (!netif_queue_stopped(dev))
|
|
netif_stop_queue(dev);
|
|
|
|
w90p910_init_desc(dev);
|
|
|
|
dev->trans_start = jiffies;
|
|
ether->cur_tx = 0x0;
|
|
ether->finish_tx = 0x0;
|
|
ether->cur_rx = 0x0;
|
|
|
|
w90p910_set_curdest(dev);
|
|
w90p910_enable_cam(dev);
|
|
w90p910_enable_cam_command(dev);
|
|
w90p910_enable_mac_interrupt(dev);
|
|
w90p910_enable_tx(dev, 1);
|
|
w90p910_enable_rx(dev, 1);
|
|
w90p910_trigger_tx(dev);
|
|
w90p910_trigger_rx(dev);
|
|
|
|
dev->trans_start = jiffies;
|
|
|
|
if (netif_queue_stopped(dev))
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
static void w90p910_mdio_write(struct net_device *dev,
|
|
int phy_id, int reg, int data)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
struct platform_device *pdev;
|
|
unsigned int val, i;
|
|
|
|
pdev = ether->pdev;
|
|
|
|
__raw_writel(data, ether->reg + REG_MIID);
|
|
|
|
val = (phy_id << 0x08) | reg;
|
|
val |= PHYBUSY | PHYWR | MDCCR_VAL;
|
|
__raw_writel(val, ether->reg + REG_MIIDA);
|
|
|
|
for (i = 0; i < DELAY; i++) {
|
|
if ((__raw_readl(ether->reg + REG_MIIDA) & PHYBUSY) == 0)
|
|
break;
|
|
}
|
|
|
|
if (i == DELAY)
|
|
dev_warn(&pdev->dev, "mdio write timed out\n");
|
|
}
|
|
|
|
static int w90p910_mdio_read(struct net_device *dev, int phy_id, int reg)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
struct platform_device *pdev;
|
|
unsigned int val, i, data;
|
|
|
|
pdev = ether->pdev;
|
|
|
|
val = (phy_id << 0x08) | reg;
|
|
val |= PHYBUSY | MDCCR_VAL;
|
|
__raw_writel(val, ether->reg + REG_MIIDA);
|
|
|
|
for (i = 0; i < DELAY; i++) {
|
|
if ((__raw_readl(ether->reg + REG_MIIDA) & PHYBUSY) == 0)
|
|
break;
|
|
}
|
|
|
|
if (i == DELAY) {
|
|
dev_warn(&pdev->dev, "mdio read timed out\n");
|
|
data = 0xffff;
|
|
} else {
|
|
data = __raw_readl(ether->reg + REG_MIID);
|
|
}
|
|
|
|
return data;
|
|
}
|
|
|
|
static int w90p910_set_mac_address(struct net_device *dev, void *addr)
|
|
{
|
|
struct sockaddr *address = addr;
|
|
|
|
if (!is_valid_ether_addr(address->sa_data))
|
|
return -EADDRNOTAVAIL;
|
|
|
|
memcpy(dev->dev_addr, address->sa_data, dev->addr_len);
|
|
w90p910_write_cam(dev, CAM0, dev->dev_addr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int w90p910_ether_close(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
struct platform_device *pdev;
|
|
|
|
pdev = ether->pdev;
|
|
|
|
dma_free_coherent(&pdev->dev, sizeof(struct recv_pdesc),
|
|
ether->rdesc, ether->rdesc_phys);
|
|
dma_free_coherent(&pdev->dev, sizeof(struct tran_pdesc),
|
|
ether->tdesc, ether->tdesc_phys);
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
del_timer_sync(ðer->check_timer);
|
|
clk_disable(ether->rmiiclk);
|
|
clk_disable(ether->clk);
|
|
|
|
free_irq(ether->txirq, dev);
|
|
free_irq(ether->rxirq, dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct net_device_stats *w90p910_ether_stats(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
|
|
ether = netdev_priv(dev);
|
|
|
|
return ðer->stats;
|
|
}
|
|
|
|
static int w90p910_send_frame(struct net_device *dev,
|
|
unsigned char *data, int length)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
struct w90p910_txbd *txbd;
|
|
struct platform_device *pdev;
|
|
unsigned char *buffer;
|
|
|
|
ether = netdev_priv(dev);
|
|
pdev = ether->pdev;
|
|
|
|
txbd = ðer->tdesc->desclist[ether->cur_tx];
|
|
buffer = ether->tdesc->tran_buf[ether->cur_tx];
|
|
|
|
if (length > 1514) {
|
|
dev_err(&pdev->dev, "send data %d bytes, check it\n", length);
|
|
length = 1514;
|
|
}
|
|
|
|
txbd->sl = length & 0xFFFF;
|
|
|
|
memcpy(buffer, data, length);
|
|
|
|
txbd->mode = TX_OWEN_DMA | PADDINGMODE | CRCMODE | MACTXINTEN;
|
|
|
|
w90p910_enable_tx(dev, 1);
|
|
|
|
w90p910_trigger_tx(dev);
|
|
|
|
if (++ether->cur_tx >= TX_DESC_SIZE)
|
|
ether->cur_tx = 0;
|
|
|
|
txbd = ðer->tdesc->desclist[ether->cur_tx];
|
|
|
|
dev->trans_start = jiffies;
|
|
|
|
if (txbd->mode & TX_OWEN_DMA)
|
|
netif_stop_queue(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int w90p910_ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
|
|
if (!(w90p910_send_frame(dev, skb->data, skb->len))) {
|
|
ether->skb = skb;
|
|
dev_kfree_skb_irq(skb);
|
|
return 0;
|
|
}
|
|
return -EAGAIN;
|
|
}
|
|
|
|
static irqreturn_t w90p910_tx_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
struct w90p910_txbd *txbd;
|
|
struct platform_device *pdev;
|
|
struct net_device *dev;
|
|
unsigned int cur_entry, entry, status;
|
|
|
|
dev = dev_id;
|
|
ether = netdev_priv(dev);
|
|
pdev = ether->pdev;
|
|
|
|
w90p910_get_and_clear_int(dev, &status);
|
|
|
|
cur_entry = __raw_readl(ether->reg + REG_CTXDSA);
|
|
|
|
entry = ether->tdesc_phys +
|
|
offsetof(struct tran_pdesc, desclist[ether->finish_tx]);
|
|
|
|
while (entry != cur_entry) {
|
|
txbd = ðer->tdesc->desclist[ether->finish_tx];
|
|
|
|
if (++ether->finish_tx >= TX_DESC_SIZE)
|
|
ether->finish_tx = 0;
|
|
|
|
if (txbd->sl & TXDS_TXCP) {
|
|
ether->stats.tx_packets++;
|
|
ether->stats.tx_bytes += txbd->sl & 0xFFFF;
|
|
} else {
|
|
ether->stats.tx_errors++;
|
|
}
|
|
|
|
txbd->sl = 0x0;
|
|
txbd->mode = 0x0;
|
|
|
|
if (netif_queue_stopped(dev))
|
|
netif_wake_queue(dev);
|
|
|
|
entry = ether->tdesc_phys +
|
|
offsetof(struct tran_pdesc, desclist[ether->finish_tx]);
|
|
}
|
|
|
|
if (status & MISTA_EXDEF) {
|
|
dev_err(&pdev->dev, "emc defer exceed interrupt\n");
|
|
} else if (status & MISTA_TXBERR) {
|
|
dev_err(&pdev->dev, "emc bus error interrupt\n");
|
|
w90p910_reset_mac(dev);
|
|
} else if (status & MISTA_TDU) {
|
|
if (netif_queue_stopped(dev))
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void netdev_rx(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
struct w90p910_rxbd *rxbd;
|
|
struct platform_device *pdev;
|
|
struct sk_buff *skb;
|
|
unsigned char *data;
|
|
unsigned int length, status, val, entry;
|
|
|
|
ether = netdev_priv(dev);
|
|
pdev = ether->pdev;
|
|
|
|
rxbd = ðer->rdesc->desclist[ether->cur_rx];
|
|
|
|
do {
|
|
val = __raw_readl(ether->reg + REG_CRXDSA);
|
|
|
|
entry = ether->rdesc_phys +
|
|
offsetof(struct recv_pdesc, desclist[ether->cur_rx]);
|
|
|
|
if (val == entry)
|
|
break;
|
|
|
|
status = rxbd->sl;
|
|
length = status & 0xFFFF;
|
|
|
|
if (status & RXDS_RXGD) {
|
|
data = ether->rdesc->recv_buf[ether->cur_rx];
|
|
skb = dev_alloc_skb(length+2);
|
|
if (!skb) {
|
|
dev_err(&pdev->dev, "get skb buffer error\n");
|
|
ether->stats.rx_dropped++;
|
|
return;
|
|
}
|
|
|
|
skb->dev = dev;
|
|
skb_reserve(skb, 2);
|
|
skb_put(skb, length);
|
|
skb_copy_to_linear_data(skb, data, length);
|
|
skb->protocol = eth_type_trans(skb, dev);
|
|
ether->stats.rx_packets++;
|
|
ether->stats.rx_bytes += length;
|
|
netif_rx(skb);
|
|
} else {
|
|
ether->stats.rx_errors++;
|
|
|
|
if (status & RXDS_RP) {
|
|
dev_err(&pdev->dev, "rx runt err\n");
|
|
ether->stats.rx_length_errors++;
|
|
} else if (status & RXDS_CRCE) {
|
|
dev_err(&pdev->dev, "rx crc err\n");
|
|
ether->stats.rx_crc_errors++;
|
|
} else if (status & RXDS_ALIE) {
|
|
dev_err(&pdev->dev, "rx aligment err\n");
|
|
ether->stats.rx_frame_errors++;
|
|
} else if (status & RXDS_PTLE) {
|
|
dev_err(&pdev->dev, "rx longer err\n");
|
|
ether->stats.rx_over_errors++;
|
|
}
|
|
}
|
|
|
|
rxbd->sl = RX_OWEN_DMA;
|
|
rxbd->reserved = 0x0;
|
|
|
|
if (++ether->cur_rx >= RX_DESC_SIZE)
|
|
ether->cur_rx = 0;
|
|
|
|
rxbd = ðer->rdesc->desclist[ether->cur_rx];
|
|
|
|
} while (1);
|
|
}
|
|
|
|
static irqreturn_t w90p910_rx_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct net_device *dev;
|
|
struct w90p910_ether *ether;
|
|
struct platform_device *pdev;
|
|
unsigned int status;
|
|
|
|
dev = dev_id;
|
|
ether = netdev_priv(dev);
|
|
pdev = ether->pdev;
|
|
|
|
w90p910_get_and_clear_int(dev, &status);
|
|
|
|
if (status & MISTA_RDU) {
|
|
netdev_rx(dev);
|
|
w90p910_trigger_rx(dev);
|
|
|
|
return IRQ_HANDLED;
|
|
} else if (status & MISTA_RXBERR) {
|
|
dev_err(&pdev->dev, "emc rx bus error\n");
|
|
w90p910_reset_mac(dev);
|
|
}
|
|
|
|
netdev_rx(dev);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int w90p910_ether_open(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
struct platform_device *pdev;
|
|
|
|
ether = netdev_priv(dev);
|
|
pdev = ether->pdev;
|
|
|
|
w90p910_reset_mac(dev);
|
|
w90p910_set_fifo_threshold(dev);
|
|
w90p910_set_curdest(dev);
|
|
w90p910_enable_cam(dev);
|
|
w90p910_enable_cam_command(dev);
|
|
w90p910_enable_mac_interrupt(dev);
|
|
w90p910_set_global_maccmd(dev);
|
|
w90p910_enable_rx(dev, 1);
|
|
|
|
ether->rx_packets = 0x0;
|
|
ether->rx_bytes = 0x0;
|
|
|
|
if (request_irq(ether->txirq, w90p910_tx_interrupt,
|
|
0x0, pdev->name, dev)) {
|
|
dev_err(&pdev->dev, "register irq tx failed\n");
|
|
return -EAGAIN;
|
|
}
|
|
|
|
if (request_irq(ether->rxirq, w90p910_rx_interrupt,
|
|
0x0, pdev->name, dev)) {
|
|
dev_err(&pdev->dev, "register irq rx failed\n");
|
|
free_irq(ether->txirq, dev);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
mod_timer(ðer->check_timer, jiffies + msecs_to_jiffies(1000));
|
|
netif_start_queue(dev);
|
|
w90p910_trigger_rx(dev);
|
|
|
|
dev_info(&pdev->dev, "%s is OPENED\n", dev->name);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void w90p910_ether_set_multicast_list(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
unsigned int rx_mode;
|
|
|
|
ether = netdev_priv(dev);
|
|
|
|
if (dev->flags & IFF_PROMISC)
|
|
rx_mode = CAMCMR_AUP | CAMCMR_AMP | CAMCMR_ABP | CAMCMR_ECMP;
|
|
else if ((dev->flags & IFF_ALLMULTI) || !netdev_mc_empty(dev))
|
|
rx_mode = CAMCMR_AMP | CAMCMR_ABP | CAMCMR_ECMP;
|
|
else
|
|
rx_mode = CAMCMR_ECMP | CAMCMR_ABP;
|
|
__raw_writel(rx_mode, ether->reg + REG_CAMCMR);
|
|
}
|
|
|
|
static int w90p910_ether_ioctl(struct net_device *dev,
|
|
struct ifreq *ifr, int cmd)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
struct mii_ioctl_data *data = if_mii(ifr);
|
|
|
|
return generic_mii_ioctl(ðer->mii, data, cmd, NULL);
|
|
}
|
|
|
|
static void w90p910_get_drvinfo(struct net_device *dev,
|
|
struct ethtool_drvinfo *info)
|
|
{
|
|
strcpy(info->driver, DRV_MODULE_NAME);
|
|
strcpy(info->version, DRV_MODULE_VERSION);
|
|
}
|
|
|
|
static int w90p910_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
return mii_ethtool_gset(ðer->mii, cmd);
|
|
}
|
|
|
|
static int w90p910_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
return mii_ethtool_sset(ðer->mii, cmd);
|
|
}
|
|
|
|
static int w90p910_nway_reset(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
return mii_nway_restart(ðer->mii);
|
|
}
|
|
|
|
static u32 w90p910_get_link(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
return mii_link_ok(ðer->mii);
|
|
}
|
|
|
|
static const struct ethtool_ops w90p910_ether_ethtool_ops = {
|
|
.get_settings = w90p910_get_settings,
|
|
.set_settings = w90p910_set_settings,
|
|
.get_drvinfo = w90p910_get_drvinfo,
|
|
.nway_reset = w90p910_nway_reset,
|
|
.get_link = w90p910_get_link,
|
|
};
|
|
|
|
static const struct net_device_ops w90p910_ether_netdev_ops = {
|
|
.ndo_open = w90p910_ether_open,
|
|
.ndo_stop = w90p910_ether_close,
|
|
.ndo_start_xmit = w90p910_ether_start_xmit,
|
|
.ndo_get_stats = w90p910_ether_stats,
|
|
.ndo_set_multicast_list = w90p910_ether_set_multicast_list,
|
|
.ndo_set_mac_address = w90p910_set_mac_address,
|
|
.ndo_do_ioctl = w90p910_ether_ioctl,
|
|
.ndo_validate_addr = eth_validate_addr,
|
|
.ndo_change_mtu = eth_change_mtu,
|
|
};
|
|
|
|
static void __init get_mac_address(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
struct platform_device *pdev;
|
|
char addr[6];
|
|
|
|
pdev = ether->pdev;
|
|
|
|
addr[0] = 0x00;
|
|
addr[1] = 0x02;
|
|
addr[2] = 0xac;
|
|
addr[3] = 0x55;
|
|
addr[4] = 0x88;
|
|
addr[5] = 0xa8;
|
|
|
|
if (is_valid_ether_addr(addr))
|
|
memcpy(dev->dev_addr, &addr, 0x06);
|
|
else
|
|
dev_err(&pdev->dev, "invalid mac address\n");
|
|
}
|
|
|
|
static int w90p910_ether_setup(struct net_device *dev)
|
|
{
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
|
|
ether_setup(dev);
|
|
dev->netdev_ops = &w90p910_ether_netdev_ops;
|
|
dev->ethtool_ops = &w90p910_ether_ethtool_ops;
|
|
|
|
dev->tx_queue_len = 16;
|
|
dev->dma = 0x0;
|
|
dev->watchdog_timeo = TX_TIMEOUT;
|
|
|
|
get_mac_address(dev);
|
|
|
|
ether->cur_tx = 0x0;
|
|
ether->cur_rx = 0x0;
|
|
ether->finish_tx = 0x0;
|
|
ether->linkflag = 0x0;
|
|
ether->mii.phy_id = 0x01;
|
|
ether->mii.phy_id_mask = 0x1f;
|
|
ether->mii.reg_num_mask = 0x1f;
|
|
ether->mii.dev = dev;
|
|
ether->mii.mdio_read = w90p910_mdio_read;
|
|
ether->mii.mdio_write = w90p910_mdio_write;
|
|
|
|
setup_timer(ðer->check_timer, w90p910_check_link,
|
|
(unsigned long)dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __devinit w90p910_ether_probe(struct platform_device *pdev)
|
|
{
|
|
struct w90p910_ether *ether;
|
|
struct net_device *dev;
|
|
int error;
|
|
|
|
dev = alloc_etherdev(sizeof(struct w90p910_ether));
|
|
if (!dev)
|
|
return -ENOMEM;
|
|
|
|
ether = netdev_priv(dev);
|
|
|
|
ether->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (ether->res == NULL) {
|
|
dev_err(&pdev->dev, "failed to get I/O memory\n");
|
|
error = -ENXIO;
|
|
goto failed_free;
|
|
}
|
|
|
|
if (!request_mem_region(ether->res->start,
|
|
resource_size(ether->res), pdev->name)) {
|
|
dev_err(&pdev->dev, "failed to request I/O memory\n");
|
|
error = -EBUSY;
|
|
goto failed_free;
|
|
}
|
|
|
|
ether->reg = ioremap(ether->res->start, resource_size(ether->res));
|
|
if (ether->reg == NULL) {
|
|
dev_err(&pdev->dev, "failed to remap I/O memory\n");
|
|
error = -ENXIO;
|
|
goto failed_free_mem;
|
|
}
|
|
|
|
ether->txirq = platform_get_irq(pdev, 0);
|
|
if (ether->txirq < 0) {
|
|
dev_err(&pdev->dev, "failed to get ether tx irq\n");
|
|
error = -ENXIO;
|
|
goto failed_free_io;
|
|
}
|
|
|
|
ether->rxirq = platform_get_irq(pdev, 1);
|
|
if (ether->rxirq < 0) {
|
|
dev_err(&pdev->dev, "failed to get ether rx irq\n");
|
|
error = -ENXIO;
|
|
goto failed_free_txirq;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, dev);
|
|
|
|
ether->clk = clk_get(&pdev->dev, NULL);
|
|
if (IS_ERR(ether->clk)) {
|
|
dev_err(&pdev->dev, "failed to get ether clock\n");
|
|
error = PTR_ERR(ether->clk);
|
|
goto failed_free_rxirq;
|
|
}
|
|
|
|
ether->rmiiclk = clk_get(&pdev->dev, "RMII");
|
|
if (IS_ERR(ether->rmiiclk)) {
|
|
dev_err(&pdev->dev, "failed to get ether clock\n");
|
|
error = PTR_ERR(ether->rmiiclk);
|
|
goto failed_put_clk;
|
|
}
|
|
|
|
ether->pdev = pdev;
|
|
|
|
w90p910_ether_setup(dev);
|
|
|
|
error = register_netdev(dev);
|
|
if (error != 0) {
|
|
dev_err(&pdev->dev, "Regiter EMC w90p910 FAILED\n");
|
|
error = -ENODEV;
|
|
goto failed_put_rmiiclk;
|
|
}
|
|
|
|
return 0;
|
|
failed_put_rmiiclk:
|
|
clk_put(ether->rmiiclk);
|
|
failed_put_clk:
|
|
clk_put(ether->clk);
|
|
failed_free_rxirq:
|
|
free_irq(ether->rxirq, pdev);
|
|
platform_set_drvdata(pdev, NULL);
|
|
failed_free_txirq:
|
|
free_irq(ether->txirq, pdev);
|
|
failed_free_io:
|
|
iounmap(ether->reg);
|
|
failed_free_mem:
|
|
release_mem_region(ether->res->start, resource_size(ether->res));
|
|
failed_free:
|
|
free_netdev(dev);
|
|
return error;
|
|
}
|
|
|
|
static int __devexit w90p910_ether_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
struct w90p910_ether *ether = netdev_priv(dev);
|
|
|
|
unregister_netdev(dev);
|
|
|
|
clk_put(ether->rmiiclk);
|
|
clk_put(ether->clk);
|
|
|
|
iounmap(ether->reg);
|
|
release_mem_region(ether->res->start, resource_size(ether->res));
|
|
|
|
free_irq(ether->txirq, dev);
|
|
free_irq(ether->rxirq, dev);
|
|
|
|
del_timer_sync(ðer->check_timer);
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
free_netdev(dev);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver w90p910_ether_driver = {
|
|
.probe = w90p910_ether_probe,
|
|
.remove = __devexit_p(w90p910_ether_remove),
|
|
.driver = {
|
|
.name = "nuc900-emc",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init w90p910_ether_init(void)
|
|
{
|
|
return platform_driver_register(&w90p910_ether_driver);
|
|
}
|
|
|
|
static void __exit w90p910_ether_exit(void)
|
|
{
|
|
platform_driver_unregister(&w90p910_ether_driver);
|
|
}
|
|
|
|
module_init(w90p910_ether_init);
|
|
module_exit(w90p910_ether_exit);
|
|
|
|
MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
|
|
MODULE_DESCRIPTION("w90p910 MAC driver!");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:nuc900-emc");
|
|
|