6a45716abb
This patch fixes partly PAGE_SIZEs of 16K or 64K by adjusting the assembler PTE lookup code and the assembler TEMPALIAS code. Furthermore some data alignments for PAGE_SIZE have been limited to 4K (or less) to not waste too much memory with greater page sizes. As a side note, the palo loader can (currently) only handle up to 10 ELF segments which is fixed with tighter aligning as well. My testings indicated that the ldci command in the sba iommu coding needed adjustment by the PAGE_SHIFT value and that the I/O PDIR Page size was only set to 4K for my machine (C3000). All this fixes partly the boot, but there are still quite some caching problems left. Examples are e.g. the symbios logic driver which is failing: sym0: <896> rev 0x7 at pci 0000:00:0f.0 irq 69 sym0: PA-RISC Firmware, ID 7, Fast-40, SE, parity checking CACHE TEST FAILED: DMA error (dstat=0x81).sym0: CACHE INCORRECTLY CONFIGURED. and the tulip network driver which doesn't seem to work correctly either: Sending BOOTP requests .net eth0: Setting full-duplex based on MII#1 link partner capability of 05e1 ..... timed out! Beside those kernel fixes glibc will need fixes too to be able to handle >4K page sizes. Signed-off-by: Helge Deller <deller@gmx.de>
305 lines
7.6 KiB
ArmAsm
305 lines
7.6 KiB
ArmAsm
/*
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* HPMC (High Priority Machine Check) handler.
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*
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* Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
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* Copyright (C) 2000 Hewlett-Packard (John Marvin)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* This HPMC handler retrieves the HPMC pim data, resets IO and
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* returns to the default trap handler with code set to 1 (HPMC).
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* The default trap handler calls handle interruption, which
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* does a stack and register dump. This at least allows kernel
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* developers to get back to C code in virtual mode, where they
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* have the option to examine and print values from memory that
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* would help in debugging an HPMC caused by a software bug.
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*
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* There is more to do here:
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*
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* 1) On MP systems we need to synchronize processors
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* before calling pdc/iodc.
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* 2) We should be checking the system state and not
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* returning to the fault handler if things are really
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* bad.
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*
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*/
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.level 1.1
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.data
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#include <asm/assembly.h>
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#include <asm/pdc.h>
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#include <linux/linkage.h>
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/*
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* stack for os_hpmc, the HPMC handler.
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* buffer for IODC procedures (for the HPMC handler).
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*
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* IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
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*/
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.align 4096
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hpmc_stack:
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.block 16384
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#define HPMC_IODC_BUF_SIZE 0x8000
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.align 4096
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hpmc_iodc_buf:
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.block HPMC_IODC_BUF_SIZE
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.align 8
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hpmc_raddr:
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.block 128
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#define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */
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.align 8
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ENTRY(hpmc_pim_data)
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.block HPMC_PIM_DATA_SIZE
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END(hpmc_pim_data)
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.text
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.import intr_save, code
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ENTRY(os_hpmc)
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.os_hpmc:
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/*
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* registers modified:
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*
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* Using callee saves registers without saving them. The
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* original values are in the pim dump if we need them.
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*
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* r2 (rp) return pointer
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* r3 address of PDCE_PROC
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* r4 scratch
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* r5 scratch
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* r23 (arg3) procedure arg
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* r24 (arg2) procedure arg
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* r25 (arg1) procedure arg
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* r26 (arg0) procedure arg
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* r30 (sp) stack pointer
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*
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* registers read:
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*
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* r26 contains address of PDCE_PROC on entry
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* r28 (ret0) return value from procedure
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*/
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copy arg0, %r3 /* save address of PDCE_PROC */
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/*
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* disable nested HPMCs
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*
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* Increment os_hpmc checksum to invalidate it.
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* Do this before turning the PSW M bit off.
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*/
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mfctl %cr14, %r4
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ldw 52(%r4),%r5
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addi 1,%r5,%r5
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stw %r5,52(%r4)
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/* MP_FIXME: synchronize all processors. */
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/* Setup stack pointer. */
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load32 PA(hpmc_stack),sp
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ldo 128(sp),sp /* leave room for arguments */
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/*
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* Most PDC routines require that the M bit be off.
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* So turn on the Q bit and turn off the M bit.
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*/
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ldo 8(%r0),%r4 /* PSW Q on, PSW M off */
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mtctl %r4,ipsw
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mtctl %r0,pcsq
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mtctl %r0,pcsq
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load32 PA(os_hpmc_1),%r4
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mtctl %r4,pcoq
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ldo 4(%r4),%r4
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mtctl %r4,pcoq
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rfi
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nop
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os_hpmc_1:
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/* Call PDC_PIM to get HPMC pim info */
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/*
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* Note that on some newer boxes, PDC_PIM must be called
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* before PDC_IO if you want IO to be reset. PDC_PIM sets
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* a flag that PDC_IO examines.
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*/
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ldo PDC_PIM(%r0), arg0
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ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
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load32 PA(hpmc_raddr),arg2
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load32 PA(hpmc_pim_data),arg3
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load32 HPMC_PIM_DATA_SIZE,%r4
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stw %r4,-52(sp)
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ldil L%PA(os_hpmc_2), rp
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bv (r3) /* call pdce_proc */
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ldo R%PA(os_hpmc_2)(rp), rp
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os_hpmc_2:
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comib,<> 0,ret0, os_hpmc_fail
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/* Reset IO by calling the hversion dependent PDC_IO routine */
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ldo PDC_IO(%r0),arg0
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ldo 0(%r0),arg1 /* log IO errors */
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ldo 0(%r0),arg2 /* reserved */
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ldo 0(%r0),arg3 /* reserved */
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stw %r0,-52(sp) /* reserved */
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ldil L%PA(os_hpmc_3),rp
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bv (%r3) /* call pdce_proc */
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ldo R%PA(os_hpmc_3)(rp),rp
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os_hpmc_3:
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/* FIXME? Check for errors from PDC_IO (-1 might be OK) */
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/*
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* Initialize the IODC console device (HPA,SPA, path etc.
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* are stored on page 0.
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*/
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/*
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* Load IODC into hpmc_iodc_buf by calling PDC_IODC.
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* Note that PDC_IODC handles flushing the appropriate
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* data and instruction cache lines.
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*/
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ldo PDC_IODC(%r0),arg0
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ldo PDC_IODC_READ(%r0),arg1
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load32 PA(hpmc_raddr),arg2
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ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
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ldo PDC_IODC_RI_INIT(%r0),%r4
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stw %r4,-52(sp)
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load32 PA(hpmc_iodc_buf),%r4
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stw %r4,-56(sp)
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load32 HPMC_IODC_BUF_SIZE,%r4
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stw %r4,-60(sp)
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ldil L%PA(os_hpmc_4),rp
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bv (%r3) /* call pdce_proc */
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ldo R%PA(os_hpmc_4)(rp),rp
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os_hpmc_4:
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comib,<> 0,ret0,os_hpmc_fail
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/* Call the entry init (just loaded by PDC_IODC) */
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ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */
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ldo ENTRY_INIT_MOD_DEV(%r0), arg1
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ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */
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depi 0,31,11,arg2 /* clear bits 21-31 */
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ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
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load32 PA(hpmc_raddr),%r4
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stw %r4, -52(sp)
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stw %r0, -56(sp) /* HV */
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stw %r0, -60(sp) /* HV */
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stw %r0, -64(sp) /* HV */
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stw %r0, -68(sp) /* lang, must be zero */
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load32 PA(hpmc_iodc_buf),%r5
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ldil L%PA(os_hpmc_5),rp
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bv (%r5)
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ldo R%PA(os_hpmc_5)(rp),rp
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os_hpmc_5:
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comib,<> 0,ret0,os_hpmc_fail
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/* Prepare to call intr_save */
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/*
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* Load kernel page directory (load into user also, since
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* we don't intend to ever return to user land anyway)
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*/
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load32 PA(swapper_pg_dir),%r4
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mtctl %r4,%cr24 /* Initialize kernel root pointer */
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mtctl %r4,%cr25 /* Initialize user root pointer */
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/* Clear sr4-sr7 */
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mtsp %r0, %sr4
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mtsp %r0, %sr5
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mtsp %r0, %sr6
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mtsp %r0, %sr7
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tovirt_r1 %r30 /* make sp virtual */
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rsm 8,%r0 /* Clear Q bit */
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ldi 1,%r8 /* Set trap code to "1" for HPMC */
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load32 PA(intr_save),%r1
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be 0(%sr7,%r1)
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nop
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os_hpmc_fail:
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/*
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* Reset the system
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*
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* Some systems may lockup from a broadcast reset, so try the
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* hversion PDC_BROADCAST_RESET() first.
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* MP_FIXME: reset all processors if more than one central bus.
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*/
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/* PDC_BROADCAST_RESET() */
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ldo PDC_BROADCAST_RESET(%r0),arg0
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ldo 0(%r0),arg1 /* do reset */
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ldil L%PA(os_hpmc_6),rp
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bv (%r3) /* call pdce_proc */
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ldo R%PA(os_hpmc_6)(rp),rp
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os_hpmc_6:
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/*
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* possible return values:
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* -1 non-existent procedure
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* -2 non-existent option
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* -16 unaligned stack
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*
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* If call returned, do a broadcast reset.
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*/
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ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
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ldo 5(%r0),%r5
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stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */
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b .
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nop
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ENDPROC(os_hpmc)
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.os_hpmc_end:
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nop
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.data
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.align 4
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.export os_hpmc_size
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os_hpmc_size:
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.word .os_hpmc_end-.os_hpmc
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