36d543a3b5
Add defines for the registers that control the GPIO pins that are run the memory interface. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
25 lines
785 B
C
25 lines
785 B
C
/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX - GPIO memory port register definitions
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*/
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#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H
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#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
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#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0)
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#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4)
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#define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0)
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#define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4)
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#define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8)
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#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0)
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#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4)
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#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */
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