e9a05bb4d3
Modify spdx tag for all CAF authored files for Kona. Change-Id: I9308c7189412b1e428a7f67ded0dc076b0e38254 Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
341 lines
8 KiB
C
341 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/sizes.h>
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#include <linux/soc/qcom/smem.h>
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#include <linux/rpmsg/qcom_glink.h>
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#include "qcom_glink_native.h"
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#define FIFO_FULL_RESERVE 8
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#define FIFO_ALIGNMENT 8
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#define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
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#define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
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#define SPSS_TX_FIFO_SIZE SZ_2K
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#define SPSS_RX_FIFO_SIZE SZ_2K
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struct glink_spss_cfg {
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__le32 tx_tail;
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__le32 tx_head;
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__le32 tx_fifo_size;
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__le32 rx_tail;
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__le32 rx_head;
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__le32 rx_fifo_size;
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};
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struct glink_spss_pipe {
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struct qcom_glink_pipe native;
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__le32 *tail;
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__le32 *head;
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void *fifo;
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int remote_pid;
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};
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#define to_spss_pipe(p) container_of(p, struct glink_spss_pipe, native)
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static void glink_spss_reset(struct qcom_glink_pipe *np)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(np);
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*pipe->head = cpu_to_le32(0);
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*pipe->tail = cpu_to_le32(0);
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}
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static size_t glink_spss_rx_avail(struct qcom_glink_pipe *np)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(np);
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u32 head;
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u32 tail;
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head = le32_to_cpu(*pipe->head);
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tail = le32_to_cpu(*pipe->tail);
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if (head < tail)
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return pipe->native.length - tail + head;
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else
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return head - tail;
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}
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static void glink_spss_rx_peak(struct qcom_glink_pipe *np,
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void *data, unsigned int offset, size_t count)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(np);
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size_t len;
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u32 tail;
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tail = le32_to_cpu(*pipe->tail);
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tail += offset;
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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len = min_t(size_t, count, pipe->native.length - tail);
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if (len)
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memcpy_fromio(data, pipe->fifo + tail, len);
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if (len != count)
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memcpy_fromio(data + len, pipe->fifo, count - len);
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}
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static void glink_spss_rx_advance(struct qcom_glink_pipe *np,
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size_t count)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(np);
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u32 tail;
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tail = le32_to_cpu(*pipe->tail);
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tail += count;
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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*pipe->tail = cpu_to_le32(tail);
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}
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static size_t glink_spss_tx_avail(struct qcom_glink_pipe *np)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(np);
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u32 head;
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u32 tail;
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u32 avail;
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head = le32_to_cpu(*pipe->head);
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tail = le32_to_cpu(*pipe->tail);
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if (tail <= head)
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avail = pipe->native.length - head + tail;
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else
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avail = tail - head;
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if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
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avail = 0;
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else
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avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
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return avail;
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}
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static unsigned int glink_spss_tx_write_one(struct glink_spss_pipe *pipe,
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unsigned int head,
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const void *data, size_t count)
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{
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size_t len;
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len = min_t(size_t, count, pipe->native.length - head);
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if (len)
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memcpy(pipe->fifo + head, data, len);
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if (len != count)
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memcpy(pipe->fifo, data + len, count - len);
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head += count;
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if (head >= pipe->native.length)
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head -= pipe->native.length;
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return head;
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}
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static void glink_spss_tx_write(struct qcom_glink_pipe *glink_pipe,
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const void *hdr, size_t hlen,
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const void *data, size_t dlen)
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{
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struct glink_spss_pipe *pipe = to_spss_pipe(glink_pipe);
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unsigned int head;
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head = le32_to_cpu(*pipe->head);
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head = glink_spss_tx_write_one(pipe, head, hdr, hlen);
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head = glink_spss_tx_write_one(pipe, head, data, dlen);
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/* Ensure head is always aligned to 8 bytes */
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head = ALIGN(head, 8);
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if (head >= pipe->native.length)
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head -= pipe->native.length;
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/* Ensure ordering of fifo and head update */
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wmb();
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*pipe->head = cpu_to_le32(head);
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}
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static void qcom_glink_spss_release(struct device *dev)
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{
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kfree(dev);
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}
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static int glink_spss_advertise_cfg(struct device *dev,
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u32 size, phys_addr_t addr)
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{
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struct device_node *np = dev->of_node;
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__le64 __iomem *spss_addr;
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__le32 __iomem *spss_size;
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struct resource addr_r;
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struct resource size_r;
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int addr_idx;
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int size_idx;
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addr_idx = of_property_match_string(np, "reg-names", "qcom,spss-addr");
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size_idx = of_property_match_string(np, "reg-names", "qcom,spss-size");
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if (addr_idx < 0 || size_idx < 0) {
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dev_err(dev, "failed to find location registers\n");
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return -EINVAL;
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}
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if (of_address_to_resource(np, addr_idx, &addr_r))
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return -ENOMEM;
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spss_addr = devm_ioremap(dev, addr_r.start, resource_size(&addr_r));
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if (IS_ERR_OR_NULL(spss_addr)) {
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dev_err(dev, "failed to map spss addr resource\n");
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return -ENOMEM;
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}
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if (of_address_to_resource(np, size_idx, &size_r))
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return -ENOMEM;
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spss_size = devm_ioremap(dev, size_r.start, resource_size(&size_r));
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if (IS_ERR_OR_NULL(spss_size)) {
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dev_err(dev, "failed to map spss size resource\n");
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return -ENOMEM;
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}
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*spss_addr = cpu_to_le64(addr);
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*spss_size = cpu_to_le32(size);
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devm_iounmap(dev, spss_addr);
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devm_iounmap(dev, spss_size);
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return 0;
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}
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struct qcom_glink *qcom_glink_spss_register(struct device *parent,
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struct device_node *node)
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{
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struct glink_spss_pipe *rx_pipe;
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struct glink_spss_pipe *tx_pipe;
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struct glink_spss_cfg *cfg;
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struct qcom_glink *glink;
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struct device *dev;
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u32 remote_pid;
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size_t tx_size;
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size_t rx_size;
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size_t size;
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int ret;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return ERR_PTR(-ENOMEM);
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dev->parent = parent;
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dev->of_node = node;
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dev->release = qcom_glink_spss_release;
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dev_set_name(dev, "%s:%s", node->parent->name, node->name);
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ret = device_register(dev);
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if (ret) {
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pr_err("failed to register glink edge %s\n", node->name);
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return ERR_PTR(ret);
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}
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ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
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&remote_pid);
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if (ret) {
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dev_err(dev, "failed to parse qcom,remote-pid\n");
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goto err_put_dev;
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}
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rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
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tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
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if (!rx_pipe || !tx_pipe) {
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ret = -ENOMEM;
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goto err_put_dev;
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}
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tx_size = SPSS_TX_FIFO_SIZE;
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rx_size = SPSS_RX_FIFO_SIZE;
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size = tx_size + rx_size + sizeof(*cfg);
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ret = qcom_smem_alloc(remote_pid,
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SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, size);
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if (ret && ret != -EEXIST) {
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dev_err(dev, "failed to allocate glink descriptors\n");
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goto err_put_dev;
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}
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cfg = qcom_smem_get(remote_pid,
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SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
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if (IS_ERR(cfg)) {
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dev_err(dev, "failed to acquire xprt descriptor\n");
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ret = PTR_ERR(cfg);
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goto err_put_dev;
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}
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if (size != tx_size + rx_size + sizeof(*cfg)) {
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dev_err(dev, "glink descriptor of invalid size\n");
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ret = -EINVAL;
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goto err_put_dev;
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}
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cfg->tx_fifo_size = cpu_to_le32(tx_size);
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cfg->rx_fifo_size = cpu_to_le32(rx_size);
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tx_pipe->tail = &cfg->tx_tail;
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tx_pipe->head = &cfg->tx_head;
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tx_pipe->native.length = tx_size;
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tx_pipe->fifo = (u8 *)cfg + sizeof(*cfg);
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rx_pipe->tail = &cfg->rx_tail;
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rx_pipe->head = &cfg->rx_head;
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rx_pipe->native.length = rx_size;
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rx_pipe->fifo = (u8 *)cfg + sizeof(*cfg) + tx_size;
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rx_pipe->native.avail = glink_spss_rx_avail;
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rx_pipe->native.peak = glink_spss_rx_peak;
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rx_pipe->native.advance = glink_spss_rx_advance;
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rx_pipe->native.reset = glink_spss_reset;
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rx_pipe->remote_pid = remote_pid;
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tx_pipe->native.avail = glink_spss_tx_avail;
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tx_pipe->native.write = glink_spss_tx_write;
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tx_pipe->native.reset = glink_spss_reset;
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tx_pipe->remote_pid = remote_pid;
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*rx_pipe->tail = 0;
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*tx_pipe->head = 0;
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ret = glink_spss_advertise_cfg(dev, size, qcom_smem_virt_to_phys(cfg));
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if (ret)
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goto err_put_dev;
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glink = qcom_glink_native_probe(dev,
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GLINK_FEATURE_INTENT_REUSE,
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&rx_pipe->native, &tx_pipe->native,
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false);
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if (IS_ERR(glink)) {
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ret = PTR_ERR(glink);
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goto err_put_dev;
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}
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return glink;
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err_put_dev:
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put_device(dev);
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return ERR_PTR(ret);
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}
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EXPORT_SYMBOL(qcom_glink_spss_register);
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void qcom_glink_spss_unregister(struct qcom_glink *glink)
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{
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qcom_glink_native_remove(glink);
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qcom_glink_native_unregister(glink);
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}
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EXPORT_SYMBOL(qcom_glink_spss_unregister);
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MODULE_DESCRIPTION("QTI GLINK SPSS driver");
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MODULE_LICENSE("GPL v2");
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