b2934c576e
Correct the FM port numbers for Chk 3.x. They are currently reversed. CRs-Fixed: 2801744 Change-Id: Id713e373b5db015830f9dc597525e1cfd5519888 Signed-off-by: Satish Kodishala <skodisha@codeaurora.org>
167 lines
5.3 KiB
C
167 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef BTFM_SLIM_SLAVE_H
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#define BTFM_SLIM_SLAVE_H
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#include "btfm_slim.h"
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/* Registers Address */
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#define SLAVE_SB_COMP_TEST 0x00000000
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#define SLAVE_SB_SLAVE_HW_REV_MSB 0x00000001
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#define SLAVE_SB_SLAVE_HW_REV_LSB 0x00000002
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#define SLAVE_SB_DEBUG_FEATURES 0x00000005
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#define SLAVE_SB_INTF_INT_EN 0x00000010
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#define SLAVE_SB_INTF_INT_STATUS 0x00000011
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#define SLAVE_SB_INTF_INT_CLR 0x00000012
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#define SLAVE_SB_FRM_CFG 0x00000013
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#define SLAVE_SB_FRM_STATUS 0x00000014
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#define SLAVE_SB_FRM_INT_EN 0x00000015
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#define SLAVE_SB_FRM_INT_STATUS 0x00000016
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#define SLAVE_SB_FRM_INT_CLR 0x00000017
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#define SLAVE_SB_FRM_WAKEUP 0x00000018
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#define SLAVE_SB_FRM_CLKCTL_DONE 0x00000019
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#define SLAVE_SB_FRM_IE_STATUS 0x0000001A
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#define SLAVE_SB_FRM_VE_STATUS 0x0000001B
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#define SLAVE_SB_PGD_TX_CFG_STATUS 0x00000020
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#define SLAVE_SB_PGD_RX_CFG_STATUS 0x00000021
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#define SLAVE_SB_PGD_DEV_INT_EN 0x00000022
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#define SLAVE_SB_PGD_DEV_INT_STATUS 0x00000023
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#define SLAVE_SB_PGD_DEV_INT_CLR 0x00000024
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#define SLAVE_SB_PGD_PORT_INT_EN_RX_0 0x00000030
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#define SLAVE_SB_PGD_PORT_INT_EN_RX_1 0x00000031
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#define SLAVE_SB_PGD_PORT_INT_EN_TX_0 0x00000032
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#define SLAVE_SB_PGD_PORT_INT_EN_TX_1 0x00000033
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#define SLAVE_SB_PGD_PORT_INT_STATUS_RX_0 0x00000034
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#define SLAVE_SB_PGD_PORT_INT_STATUS_RX_1 0x00000035
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#define SLAVE_SB_PGD_PORT_INT_STATUS_TX_0 0x00000036
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#define SLAVE_SB_PGD_PORT_INT_STATUS_TX_1 0x00000037
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#define SLAVE_SB_PGD_PORT_INT_CLR_RX_0 0x00000038
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#define SLAVE_SB_PGD_PORT_INT_CLR_RX_1 0x00000039
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#define SLAVE_SB_PGD_PORT_INT_CLR_TX_0 0x0000003A
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#define SLAVE_SB_PGD_PORT_INT_CLR_TX_1 0x0000003B
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#define SLAVE_SB_PGD_PORT_RX_CFGN(n) (0x00000040 + n)
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#define SLAVE_SB_PGD_PORT_TX_CFGN(n) (0x00000050 + n)
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#define SLAVE_SB_PGD_PORT_INT_RX_SOURCEN(n) (0x00000060 + n)
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#define SLAVE_SB_PGD_PORT_INT_TX_SOURCEN(n) (0x00000070 + n)
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#define SLAVE_SB_PGD_PORT_RX_STATUSN(n) (0x00000080 + n)
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#define SLAVE_SB_PGD_PORT_TX_STATUSN(n) (0x00000090 + n)
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#define SLAVE_SB_PGD_TX_PORTn_MULTI_CHNL_0(n) (0x00000100 + 0x4*n)
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#define SLAVE_SB_PGD_TX_PORTn_MULTI_CHNL_1(n) (0x00000101 + 0x4*n)
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#define SLAVE_SB_PGD_RX_PORTn_MULTI_CHNL_0(n) (0x00000180 + 0x4*n)
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#define SLAVE_SB_PGD_RX_PORTn_MULTI_CHNL_1(n) (0x00000181 + 0x4*n)
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#define SLAVE_SB_PGD_PORT_TX_OR_UR_CFGN(n) (0x000001F0 + n)
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/* Register Bit Setting */
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#define SLAVE_ENABLE_OVERRUN_AUTO_RECOVERY (0x1 << 1)
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#define SLAVE_ENABLE_UNDERRUN_AUTO_RECOVERY (0x1 << 0)
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#define SLAVE_SB_PGD_PORT_ENABLE (0x1 << 0)
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#define SLAVE_SB_PGD_PORT_DISABLE (0x0 << 0)
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#define SLAVE_SB_PGD_PORT_WM_L1 (0x1 << 1)
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#define SLAVE_SB_PGD_PORT_WM_L2 (0x2 << 1)
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#define SLAVE_SB_PGD_PORT_WM_L3 (0x3 << 1)
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#define SLAVE_SB_PGD_PORT_WM_L8 (0x8 << 1)
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#define SLAVE_SB_PGD_PORT_WM_LB (0xB << 1)
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#define SLAVE_SB_PGD_PORT_RX_NUM 16
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#define SLAVE_SB_PGD_PORT_TX_NUM 16
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/* PGD Port Map */
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#define SLAVE_SB_PGD_PORT_TX_SCO 0
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#define SLAVE_SB_PGD_PORT_TX1_FM 1
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#define SLAVE_SB_PGD_PORT_TX2_FM 2
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#define CHRKVER3_SB_PGD_PORT_TX1_FM 5
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#define CHRKVER3_SB_PGD_PORT_TX2_FM 4
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#define SLAVE_SB_PGD_PORT_RX_SCO 16
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#define SLAVE_SB_PGD_PORT_RX_A2P 17
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enum {
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QCA_CHEROKEE_SOC_ID_0200 = 0x40010200,
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QCA_CHEROKEE_SOC_ID_0201 = 0x40010201,
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QCA_CHEROKEE_SOC_ID_0210 = 0x40010214,
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QCA_CHEROKEE_SOC_ID_0211 = 0x40010224,
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QCA_CHEROKEE_SOC_ID_0310 = 0x40010310,
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QCA_CHEROKEE_SOC_ID_0320 = 0x40010320,
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QCA_CHEROKEE_SOC_ID_0320_UMC = 0x40014320,
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};
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enum {
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QCA_APACHE_SOC_ID_0100 = 0x40020120,
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QCA_APACHE_SOC_ID_0110 = 0x40020130,
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QCA_APACHE_SOC_ID_0120 = 0x40020140,
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QCA_APACHE_SOC_ID_0121 = 0x40020150,
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};
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enum {
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QCA_COMANCHE_SOC_ID_0101 = 0x40070101,
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QCA_COMANCHE_SOC_ID_0110 = 0x40070110,
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QCA_COMANCHE_SOC_ID_0120 = 0x40070120,
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};
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enum {
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QCA_HASTINGS_SOC_ID_0200 = 0x400A0200,
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};
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enum {
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QCA_HSP_SOC_ID_0100 = 0x400C0100,
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QCA_HSP_SOC_ID_0110 = 0x400C0110,
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QCA_HSP_SOC_ID_0200 = 0x400C0200,
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};
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/* Function Prototype */
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/*
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* btfm_slim_slave_hw_init: Initialize slave specific slimbus slave device
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* @btfmslim: slimbus slave device data pointer.
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* Returns:
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* 0: Success
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* else: Fail
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*/
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int btfm_slim_slave_hw_init(struct btfmslim *btfmslim);
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/*
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* btfm_slim_slave_enable_rxport: Enable slave Rx port by given port number
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* @btfmslim: slimbus slave device data pointer.
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* @portNum: slimbus slave port number to enable
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* @rxport: rxport or txport
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* @enable: enable port or disable port
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* Returns:
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* 0: Success
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* else: Fail
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*/
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int btfm_slim_slave_enable_port(struct btfmslim *btfmslim, uint8_t portNum,
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uint8_t rxport, uint8_t enable);
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/* Specific defines for slave slimbus device */
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#define SLAVE_SLIM_REG_OFFSET 0x0800
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#ifdef SLIM_SLAVE_REG_OFFSET
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#undef SLIM_SLAVE_REG_OFFSET
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#define SLIM_SLAVE_REG_OFFSET SLAVE_SLIM_REG_OFFSET
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#endif
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/* Assign vendor specific function */
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extern struct btfmslim_ch slave_txport[];
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extern struct btfmslim_ch slave_rxport[];
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#ifdef SLIM_SLAVE_RXPORT
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#undef SLIM_SLAVE_RXPORT
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#define SLIM_SLAVE_RXPORT (&slave_rxport[0])
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#endif
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#ifdef SLIM_SLAVE_TXPORT
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#undef SLIM_SLAVE_TXPORT
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#define SLIM_SLAVE_TXPORT (&slave_txport[0])
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#endif
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#ifdef SLIM_SLAVE_INIT
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#undef SLIM_SLAVE_INIT
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#define SLIM_SLAVE_INIT btfm_slim_slave_hw_init
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#endif
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#ifdef SLIM_SLAVE_PORT_EN
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#undef SLIM_SLAVE_PORT_EN
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#define SLIM_SLAVE_PORT_EN btfm_slim_slave_enable_port
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#endif
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#endif
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