f6b0fa02e8
This adds core support for saving and restoring CPU coprocessor registers for suspend/resume support. This contains support for suspend with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs. Tested on Assabet and Tegra 2. Tested-by: Colin Cross <ccross@android.com> Tested-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
133 lines
5.1 KiB
C
133 lines
5.1 KiB
C
/*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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*
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* Generate definitions needed by assembly language modules.
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* This code generates raw asm output which is post-processed to extract
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* and format the required data.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <asm/cacheflush.h>
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#include <asm/glue-df.h>
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#include <asm/glue-pf.h>
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#include <asm/mach/arch.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/procinfo.h>
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#include <linux/kbuild.h>
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/*
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* Make sure that the compiler and target are compatible.
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*/
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#if defined(__APCS_26__)
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#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
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#endif
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/*
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* GCC 3.0, 3.1: general bad code generation.
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* GCC 3.2.0: incorrect function argument offset calculation.
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* GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
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* (http://gcc.gnu.org/PR8896) and incorrect structure
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* initialisation in fs/jffs2/erase.c
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*/
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#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
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#error Your compiler is too buggy; it is known to miscompile kernels.
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#error Known good compilers: 3.3
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#endif
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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#ifdef CONFIG_CC_STACKPROTECTOR
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DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
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#endif
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BLANK();
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
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DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
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DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
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DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
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DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
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DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
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#ifdef CONFIG_ARM_THUMBEE
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DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
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#endif
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#ifdef CONFIG_IWMMXT
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DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
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#endif
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#ifdef CONFIG_CRUNCH
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DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
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#endif
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BLANK();
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DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
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DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
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DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
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DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
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DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
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DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
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DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
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DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
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DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
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DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
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DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
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DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
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DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
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DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
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DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
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DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
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DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
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DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
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DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
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BLANK();
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#ifdef CONFIG_CPU_HAS_ASID
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
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BLANK();
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#endif
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(SYS_ERROR0, 0x9f0000);
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BLANK();
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DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
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DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
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DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
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BLANK();
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DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
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DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
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DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
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DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
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BLANK();
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#ifdef MULTI_DABORT
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DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
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#endif
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#ifdef MULTI_PABORT
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DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
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#endif
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#ifdef MULTI_CPU
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DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
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DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
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DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
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#endif
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#ifdef MULTI_CACHE
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DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
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#endif
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BLANK();
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DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
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return 0;
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}
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