3dd083255d
The following patch makes swsusp avoid the possible temporary corruption of page translation tables during resume on x86-64. This is achieved by creating a copy of the relevant page tables that will not be modified by swsusp and can be safely used by it on resume. The problem is that during resume on x86-64 swsusp may temporarily corrupt the page tables used for the direct mapping of RAM. If that happens, a page fault occurs and cannot be handled properly, which leads to the solid hang of the affected system. This leads to the loss of the system's state from before suspend and may result in the loss of data or the corruption of filesystems, so it is a serious issue. Also, it appears to happen quite often (for me, as often as 50% of the time). The problem is related to the fact that (at least) one of the PMD entries used in the direct memory mapping (starting at PAGE_OFFSET) points to a page table the physical address of which is much greater than the physical address of the PMD entry itself. Moreover, unfortunately, the physical address of the page table before suspend (i.e. the one stored in the suspend image) happens to be different to the physical address of the corresponding page table used during resume (i.e. the one that is valid right before swsusp_arch_resume() in arch/x86_64/kernel/suspend_asm.S is executed). Thus while the image is restored, the "offending" PMD entry gets overwritten, so it does not point to the right physical address any more (i.e. there's no page table at the address pointed to by it, because it points to the address the page table has been at during suspend). Consequently, if the PMD entry is used later on, and it _is_ used in the process of copying the image pages, a page fault occurs, but it cannot be handled in the normal way and the system hangs. In principle we can call create_resume_mapping() from swsusp_arch_resume() (ie. from suspend_asm.S), but then the memory allocations in create_resume_mapping(), resume_pud_mapping(), and resume_pmd_mapping() must be made carefully so that we use _only_ NosaveFree pages in them (the other pages are overwritten by the loop in swsusp_arch_resume()). Additionally, we are in atomic context at that time, so we cannot use GFP_KERNEL. Moreover, if one of the allocations fails, we should free all of the allocated pages, so we need to trace them somehow. All of this is done in the appended patch, except that the functions populating the page tables are located in arch/x86_64/kernel/suspend.c rather than in init.c. It may be done in a more elegan way in the future, with the help of some swsusp patches that are in the works now. [AK: move some externs into headers, renamed a function] Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
270 lines
6.6 KiB
C
270 lines
6.6 KiB
C
/*
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* Suspend support specific for i386.
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*
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* Distribute under GPLv2
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*
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* Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
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* Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
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*/
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#include <linux/config.h>
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#include <linux/smp.h>
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#include <linux/suspend.h>
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#include <asm/proto.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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struct saved_context saved_context;
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unsigned long saved_context_eax, saved_context_ebx, saved_context_ecx, saved_context_edx;
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unsigned long saved_context_esp, saved_context_ebp, saved_context_esi, saved_context_edi;
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unsigned long saved_context_r08, saved_context_r09, saved_context_r10, saved_context_r11;
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unsigned long saved_context_r12, saved_context_r13, saved_context_r14, saved_context_r15;
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unsigned long saved_context_eflags;
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void __save_processor_state(struct saved_context *ctxt)
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{
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kernel_fpu_begin();
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/*
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* descriptor tables
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*/
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asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
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asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
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asm volatile ("str %0" : "=m" (ctxt->tr));
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/* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
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/* EFER should be constant for kernel version, no need to handle it. */
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/*
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* segment registers
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*/
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asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));
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asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
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asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
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asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
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asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
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rdmsrl(MSR_FS_BASE, ctxt->fs_base);
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rdmsrl(MSR_GS_BASE, ctxt->gs_base);
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rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
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/*
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* control registers
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*/
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asm volatile ("movq %%cr0, %0" : "=r" (ctxt->cr0));
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asm volatile ("movq %%cr2, %0" : "=r" (ctxt->cr2));
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asm volatile ("movq %%cr3, %0" : "=r" (ctxt->cr3));
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asm volatile ("movq %%cr4, %0" : "=r" (ctxt->cr4));
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asm volatile ("movq %%cr8, %0" : "=r" (ctxt->cr8));
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}
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void save_processor_state(void)
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{
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__save_processor_state(&saved_context);
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}
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static void
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do_fpu_end(void)
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{
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/* restore FPU regs if necessary */
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/* Do it out of line so that gcc does not move cr0 load to some stupid place */
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kernel_fpu_end();
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mxcsr_feature_mask_init();
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}
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void __restore_processor_state(struct saved_context *ctxt)
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{
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/*
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* control registers
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*/
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asm volatile ("movq %0, %%cr8" :: "r" (ctxt->cr8));
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asm volatile ("movq %0, %%cr4" :: "r" (ctxt->cr4));
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asm volatile ("movq %0, %%cr3" :: "r" (ctxt->cr3));
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asm volatile ("movq %0, %%cr2" :: "r" (ctxt->cr2));
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asm volatile ("movq %0, %%cr0" :: "r" (ctxt->cr0));
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/*
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* now restore the descriptor tables to their proper values
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* ltr is done i fix_processor_context().
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*/
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asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
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asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
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/*
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* segment registers
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*/
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asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));
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asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
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asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
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load_gs_index(ctxt->gs);
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asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
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wrmsrl(MSR_FS_BASE, ctxt->fs_base);
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wrmsrl(MSR_GS_BASE, ctxt->gs_base);
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wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
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fix_processor_context();
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do_fpu_end();
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mtrr_ap_init();
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}
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void restore_processor_state(void)
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{
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__restore_processor_state(&saved_context);
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}
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void fix_processor_context(void)
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{
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int cpu = smp_processor_id();
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struct tss_struct *t = &per_cpu(init_tss, cpu);
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set_tss_desc(cpu,t); /* This just modifies memory; should not be neccessary. But... This is neccessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
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cpu_gdt_table[cpu][GDT_ENTRY_TSS].type = 9;
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syscall_init(); /* This sets MSR_*STAR and related */
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load_TR_desc(); /* This does ltr */
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load_LDT(¤t->active_mm->context); /* This does lldt */
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/*
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* Now maybe reload the debug registers
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*/
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if (current->thread.debugreg7){
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loaddebug(¤t->thread, 0);
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loaddebug(¤t->thread, 1);
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loaddebug(¤t->thread, 2);
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loaddebug(¤t->thread, 3);
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/* no 4 and 5 */
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loaddebug(¤t->thread, 6);
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loaddebug(¤t->thread, 7);
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}
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}
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#ifdef CONFIG_SOFTWARE_SUSPEND
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/* Defined in arch/x86_64/kernel/suspend_asm.S */
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extern int restore_image(void);
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pgd_t *temp_level4_pgt;
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static void **pages;
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static inline void *__add_page(void)
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{
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void **c;
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c = (void **)get_usable_page(GFP_ATOMIC);
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if (c) {
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*c = pages;
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pages = c;
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}
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return c;
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}
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static inline void *__next_page(void)
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{
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void **c;
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c = pages;
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if (c) {
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pages = *c;
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*c = NULL;
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}
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return c;
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}
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/*
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* Try to allocate as many usable pages as needed and daisy chain them.
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* If one allocation fails, free the pages allocated so far
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*/
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static int alloc_usable_pages(unsigned long n)
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{
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void *p;
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pages = NULL;
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do
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if (!__add_page())
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break;
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while (--n);
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if (n) {
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p = __next_page();
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while (p) {
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free_page((unsigned long)p);
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p = __next_page();
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}
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return -ENOMEM;
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}
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return 0;
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}
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static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
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{
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long i, j;
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i = pud_index(address);
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pud = pud + i;
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for (; i < PTRS_PER_PUD; pud++, i++) {
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unsigned long paddr;
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pmd_t *pmd;
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paddr = address + i*PUD_SIZE;
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if (paddr >= end)
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break;
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pmd = (pmd_t *)__next_page();
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set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
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for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
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unsigned long pe;
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if (paddr >= end)
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break;
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pe = _PAGE_NX | _PAGE_PSE | _KERNPG_TABLE | paddr;
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pe &= __supported_pte_mask;
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set_pmd(pmd, __pmd(pe));
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}
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}
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}
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static void set_up_temporary_mappings(void)
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{
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unsigned long start, end, next;
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temp_level4_pgt = (pgd_t *)__next_page();
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/* It is safe to reuse the original kernel mapping */
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set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map),
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init_level4_pgt[pgd_index(__START_KERNEL_map)]);
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/* Set up the direct mapping from scratch */
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start = (unsigned long)pfn_to_kaddr(0);
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end = (unsigned long)pfn_to_kaddr(end_pfn);
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for (; start < end; start = next) {
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pud_t *pud = (pud_t *)__next_page();
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next = start + PGDIR_SIZE;
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if (next > end)
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next = end;
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res_phys_pud_init(pud, __pa(start), __pa(next));
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set_pgd(temp_level4_pgt + pgd_index(start),
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mk_kernel_pgd(__pa(pud)));
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}
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}
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int swsusp_arch_resume(void)
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{
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unsigned long n;
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n = ((end_pfn << PAGE_SHIFT) + PUD_SIZE - 1) >> PUD_SHIFT;
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n += (n + PTRS_PER_PUD - 1) / PTRS_PER_PUD + 1;
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pr_debug("swsusp_arch_resume(): pages needed = %lu\n", n);
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if (alloc_usable_pages(n)) {
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free_eaten_memory();
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return -ENOMEM;
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}
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/* We have got enough memory and from now on we cannot recover */
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set_up_temporary_mappings();
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restore_image();
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return 0;
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}
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#endif /* CONFIG_SOFTWARE_SUSPEND */
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