kernel-fxtec-pro1x/drivers/staging/tidspbridge
Vladimir Zapolskiy fcde2bf0b9 staging: tidspbridge: MMU2 registers are limited to 32-bit data access
According to OMAP3 TRM access to MMU registers shall be strictly 32-bit
aligned.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-19 13:42:49 -07:00
..
core staging: tidspbridge: fix compilation on dsp clock functions 2011-08-24 14:35:26 -07:00
Documentation
dynload Revert wrong fixes for common misspellings 2011-04-26 23:31:11 -07:00
gen staging: tidspbridge: dont cast void* from kmalloc() 2011-08-23 15:22:57 -07:00
hw staging: tidspbridge: MMU2 registers are limited to 32-bit data access 2011-10-19 13:42:49 -07:00
include/dspbridge atomic: use <linux/atomic.h> 2011-07-26 16:49:47 -07:00
pmgr Fix common misspellings 2011-03-31 11:26:23 -03:00
rmgr Fix common misspellings 2011-03-31 11:26:23 -03:00
Kconfig Revert "staging: tidspbridge - update Kconfig to select IOMMU module" 2010-11-10 18:34:42 -06:00
Makefile staging: tidspbridge: remove gb bitmap implementation 2011-02-04 20:11:33 -06:00
TODO staging: tidspbridge: remove custom linked list 2011-02-04 20:11:41 -06:00