ffd58bd2e4
This patch extends the kirkwood's PCIe support up to 2 controllers as in the 6282 devices. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/*
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* arch/arm/mach-kirkwood/include/mach/irqs.h
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*
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* IRQ definitions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/*
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* Low Interrupt Controller
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*/
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#define IRQ_KIRKWOOD_HIGH_SUM 0
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#define IRQ_KIRKWOOD_BRIDGE 1
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#define IRQ_KIRKWOOD_HOST2CPU 2
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#define IRQ_KIRKWOOD_CPU2HOST 3
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#define IRQ_KIRKWOOD_XOR_00 5
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#define IRQ_KIRKWOOD_XOR_01 6
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#define IRQ_KIRKWOOD_XOR_10 7
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#define IRQ_KIRKWOOD_XOR_11 8
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#define IRQ_KIRKWOOD_PCIE 9
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#define IRQ_KIRKWOOD_PCIE1 10
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#define IRQ_KIRKWOOD_GE00_SUM 11
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#define IRQ_KIRKWOOD_GE01_SUM 15
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#define IRQ_KIRKWOOD_USB 19
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#define IRQ_KIRKWOOD_SATA 21
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#define IRQ_KIRKWOOD_CRYPTO 22
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#define IRQ_KIRKWOOD_SPI 23
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#define IRQ_KIRKWOOD_I2S 24
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#define IRQ_KIRKWOOD_TS_0 26
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#define IRQ_KIRKWOOD_SDIO 28
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#define IRQ_KIRKWOOD_TWSI 29
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#define IRQ_KIRKWOOD_AVB 30
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#define IRQ_KIRKWOOD_TDMI 31
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/*
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* High Interrupt Controller
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*/
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#define IRQ_KIRKWOOD_UART_0 33
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#define IRQ_KIRKWOOD_UART_1 34
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#define IRQ_KIRKWOOD_GPIO_LOW_0_7 35
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#define IRQ_KIRKWOOD_GPIO_LOW_8_15 36
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#define IRQ_KIRKWOOD_GPIO_LOW_16_23 37
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#define IRQ_KIRKWOOD_GPIO_LOW_24_31 38
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#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39
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#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40
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#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41
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#define IRQ_KIRKWOOD_GE00_ERR 46
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#define IRQ_KIRKWOOD_GE01_ERR 47
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/*
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* KIRKWOOD General Purpose Pins
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*/
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#define IRQ_KIRKWOOD_GPIO_START 64
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#define NR_GPIO_IRQS 50
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#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS)
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#endif
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