7be2c7c96a
This is an "RTC framework" driver for the "CMOS" RTCs which are standard on PCs and some other platforms. That's MC146818 compatible silicon. Advantages of this vs. drivers/char/rtc.c (use one _or_ the other, only one will be able to claim the RTC irq) include: - This leverages both the new RTC framework and the driver model; both PNPACPI and platform device modes are supported. (A separate patch creates a platform device on PCs where PNPACPI isn't configured.) - It supports common extensions like longer alarms. (A separate patch exports that information from ACPI through platform_data.) - Likewise, system wakeup events use "real driver model support", with policy control via sysfs "wakeup" attributes and and using normal rtc ioctls to manage wakeup. (Patch in the works. The ACPI hooks are known; /proc/acpi/alarm can vanish. Making it work with EFI will be a minor challenge to someone with e.g. a MiniMac.) It's not yet been tested on non-x86 systems, without ACPI, or with HPET. And the RTC framework will surely have teething pains on "mainstream" PC-based systems (though must embedded Linux systems use it heavily), not limited to sorting out the "/dev/rtc0" issue (udev easily tweaked). Also, the ALSA rtctimer code doesn't use the new RTC API. Otherwise, this should be a no-known-regressions replacement for the old drivers/char/rtc.c driver, and should help the non-embedded distros (and the new timekeeping code) start to switch to the framework. Note also that any systems using "rtc-m48t86" are candidates to switch over to this more functional driver; the platform data is different, and the way bytes are read is different, but otherwise those chips should be compatible. [akpm@osdl.org: sparc32 fix] [akpm@osdl.org: sparc64 fix] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Woody Suwalski <woodys@xandros.com> Cc: Alessandro Zummo <alessandro.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
109 lines
3.9 KiB
C
109 lines
3.9 KiB
C
/* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
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* Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
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* derived from Data Sheet, Copyright Motorola 1984 (!).
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* It was written to be part of the Linux operating system.
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*/
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/* permission is hereby granted to copy, modify and redistribute this code
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* in terms of the GNU Library General Public License, Version 2 or later,
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* at your option.
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*/
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#ifndef _MC146818RTC_H
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#define _MC146818RTC_H
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#include <asm/io.h>
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#include <linux/rtc.h> /* get the user-level API */
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#include <asm/mc146818rtc.h> /* register access macros */
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#ifdef __KERNEL__
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#include <linux/spinlock.h> /* spinlock_t */
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extern spinlock_t rtc_lock; /* serialize CMOS RAM access */
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/* Some RTCs extend the mc146818 register set to support alarms of more
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* than 24 hours in the future; or dates that include a century code.
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* This platform_data structure can pass this information to the driver.
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*/
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struct cmos_rtc_board_info {
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u8 rtc_day_alarm; /* zero, or register index */
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u8 rtc_mon_alarm; /* zero, or register index */
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u8 rtc_century; /* zero, or register index */
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};
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#endif
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/**********************************************************************
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* register summary
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**********************************************************************/
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#define RTC_SECONDS 0
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#define RTC_SECONDS_ALARM 1
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#define RTC_MINUTES 2
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#define RTC_MINUTES_ALARM 3
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#define RTC_HOURS 4
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#define RTC_HOURS_ALARM 5
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/* RTC_*_alarm is always true if 2 MSBs are set */
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# define RTC_ALARM_DONT_CARE 0xC0
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#define RTC_DAY_OF_WEEK 6
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#define RTC_DAY_OF_MONTH 7
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#define RTC_MONTH 8
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#define RTC_YEAR 9
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/* control registers - Moto names
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*/
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#define RTC_REG_A 10
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#define RTC_REG_B 11
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#define RTC_REG_C 12
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#define RTC_REG_D 13
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/**********************************************************************
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* register details
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**********************************************************************/
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#define RTC_FREQ_SELECT RTC_REG_A
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/* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
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* reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
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* totalling to a max high interval of 2.228 ms.
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*/
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# define RTC_UIP 0x80
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# define RTC_DIV_CTL 0x70
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/* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
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# define RTC_REF_CLCK_4MHZ 0x00
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# define RTC_REF_CLCK_1MHZ 0x10
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# define RTC_REF_CLCK_32KHZ 0x20
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/* 2 values for divider stage reset, others for "testing purposes only" */
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# define RTC_DIV_RESET1 0x60
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# define RTC_DIV_RESET2 0x70
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/* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
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# define RTC_RATE_SELECT 0x0F
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/**********************************************************************/
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#define RTC_CONTROL RTC_REG_B
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# define RTC_SET 0x80 /* disable updates for clock setting */
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# define RTC_PIE 0x40 /* periodic interrupt enable */
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# define RTC_AIE 0x20 /* alarm interrupt enable */
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# define RTC_UIE 0x10 /* update-finished interrupt enable */
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# define RTC_SQWE 0x08 /* enable square-wave output */
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# define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
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# define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
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# define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
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/**********************************************************************/
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#define RTC_INTR_FLAGS RTC_REG_C
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/* caution - cleared by read */
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# define RTC_IRQF 0x80 /* any of the following 3 is active */
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# define RTC_PF 0x40
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# define RTC_AF 0x20
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# define RTC_UF 0x10
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/**********************************************************************/
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#define RTC_VALID RTC_REG_D
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# define RTC_VRT 0x80 /* valid RAM and time */
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/**********************************************************************/
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#ifndef ARCH_RTC_LOCATION /* Override by <asm/mc146818rtc.h>? */
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#define RTC_IO_EXTENT 0x8
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#define RTC_IOMAPPED 1 /* Default to I/O mapping. */
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#endif /* ARCH_RTC_LOCATION */
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#endif /* _MC146818RTC_H */
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