1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
242 lines
6.6 KiB
C
242 lines
6.6 KiB
C
/*
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* PowerPC memory management structures
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*
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* Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
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* PPC64 rework.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _PPC64_MMU_H_
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#define _PPC64_MMU_H_
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#include <linux/config.h>
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#include <asm/page.h>
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#include <linux/stringify.h>
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#ifndef __ASSEMBLY__
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/* Time to allow for more things here */
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typedef unsigned long mm_context_id_t;
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typedef struct {
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mm_context_id_t id;
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#ifdef CONFIG_HUGETLB_PAGE
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pgd_t *huge_pgdir;
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u16 htlb_segs; /* bitmask */
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#endif
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} mm_context_t;
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#define STE_ESID_V 0x80
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#define STE_ESID_KS 0x20
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#define STE_ESID_KP 0x10
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#define STE_ESID_N 0x08
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#define STE_VSID_SHIFT 12
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struct stab_entry {
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unsigned long esid_data;
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unsigned long vsid_data;
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};
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/* Hardware Page Table Entry */
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#define HPTES_PER_GROUP 8
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typedef struct {
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unsigned long avpn:57; /* vsid | api == avpn */
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unsigned long : 2; /* Software use */
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unsigned long bolted: 1; /* HPTE is "bolted" */
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unsigned long lock: 1; /* lock on pSeries SMP */
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unsigned long l: 1; /* Virtual page is large (L=1) or 4 KB (L=0) */
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unsigned long h: 1; /* Hash function identifier */
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unsigned long v: 1; /* Valid (v=1) or invalid (v=0) */
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} Hpte_dword0;
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typedef struct {
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unsigned long pp0: 1; /* Page protection bit 0 */
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unsigned long ts: 1; /* Tag set bit */
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unsigned long rpn: 50; /* Real page number */
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unsigned long : 2; /* Reserved */
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unsigned long ac: 1; /* Address compare */
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unsigned long r: 1; /* Referenced */
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unsigned long c: 1; /* Changed */
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unsigned long w: 1; /* Write-thru cache mode */
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unsigned long i: 1; /* Cache inhibited */
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unsigned long m: 1; /* Memory coherence required */
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unsigned long g: 1; /* Guarded */
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unsigned long n: 1; /* No-execute */
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unsigned long pp: 2; /* Page protection bits 1:2 */
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} Hpte_dword1;
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typedef struct {
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char padding[6]; /* padding */
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unsigned long : 6; /* padding */
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unsigned long flags: 10; /* HPTE flags */
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} Hpte_dword1_flags;
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typedef struct {
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union {
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unsigned long dword0;
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Hpte_dword0 dw0;
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} dw0;
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union {
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unsigned long dword1;
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Hpte_dword1 dw1;
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Hpte_dword1_flags flags;
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} dw1;
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} HPTE;
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/* Values for PP (assumes Ks=0, Kp=1) */
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/* pp0 will always be 0 for linux */
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#define PP_RWXX 0 /* Supervisor read/write, User none */
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#define PP_RWRX 1 /* Supervisor read/write, User read */
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#define PP_RWRW 2 /* Supervisor read/write, User read/write */
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#define PP_RXRX 3 /* Supervisor read, User read */
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extern HPTE * htab_address;
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extern unsigned long htab_hash_mask;
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static inline unsigned long hpt_hash(unsigned long vpn, int large)
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{
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unsigned long vsid;
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unsigned long page;
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if (large) {
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vsid = vpn >> 4;
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page = vpn & 0xf;
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} else {
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vsid = vpn >> 16;
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page = vpn & 0xffff;
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}
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return (vsid & 0x7fffffffffUL) ^ page;
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}
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static inline void __tlbie(unsigned long va, int large)
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{
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/* clear top 16 bits, non SLS segment */
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va &= ~(0xffffULL << 48);
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if (large) {
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va &= HPAGE_MASK;
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asm volatile("tlbie %0,1" : : "r"(va) : "memory");
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} else {
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va &= PAGE_MASK;
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asm volatile("tlbie %0,0" : : "r"(va) : "memory");
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}
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}
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static inline void tlbie(unsigned long va, int large)
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{
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asm volatile("ptesync": : :"memory");
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__tlbie(va, large);
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asm volatile("eieio; tlbsync; ptesync": : :"memory");
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}
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static inline void __tlbiel(unsigned long va)
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{
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/* clear top 16 bits, non SLS segment */
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va &= ~(0xffffULL << 48);
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va &= PAGE_MASK;
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/*
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* Thanks to Alan Modra we are now able to use machine specific
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* assembly instructions (like tlbiel) by using the gas -many flag.
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* However we have to support older toolchains so for the moment
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* we hardwire it.
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*/
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#if 0
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asm volatile("tlbiel %0" : : "r"(va) : "memory");
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#else
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asm volatile(".long 0x7c000224 | (%0 << 11)" : : "r"(va) : "memory");
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#endif
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}
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static inline void tlbiel(unsigned long va)
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{
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asm volatile("ptesync": : :"memory");
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__tlbiel(va);
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asm volatile("ptesync": : :"memory");
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}
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/*
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* Handle a fault by adding an HPTE. If the address can't be determined
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* to be valid via Linux page tables, return 1. If handled return 0
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*/
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extern int __hash_page(unsigned long ea, unsigned long access,
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unsigned long vsid, pte_t *ptep, unsigned long trap,
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int local);
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extern void htab_finish_init(void);
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#endif /* __ASSEMBLY__ */
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/*
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* Location of cpu0's segment table
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*/
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#define STAB0_PAGE 0x9
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#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
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#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
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#define SLB_NUM_BOLTED 3
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#define SLB_CACHE_ENTRIES 8
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/* Bits in the SLB ESID word */
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#define SLB_ESID_V 0x0000000008000000 /* entry is valid */
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/* Bits in the SLB VSID word */
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#define SLB_VSID_SHIFT 12
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#define SLB_VSID_KS 0x0000000000000800
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#define SLB_VSID_KP 0x0000000000000400
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#define SLB_VSID_N 0x0000000000000200 /* no-execute */
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#define SLB_VSID_L 0x0000000000000100 /* largepage (4M) */
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#define SLB_VSID_C 0x0000000000000080 /* class */
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#define SLB_VSID_KERNEL (SLB_VSID_KP|SLB_VSID_C)
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#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS)
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#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
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#define VSID_BITS 36
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#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
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#define CONTEXT_BITS 20
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#define USER_ESID_BITS 15
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/*
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* This macro generates asm code to compute the VSID scramble
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* function. Used in slb_allocate() and do_stab_bolted. The function
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* computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
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*
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* rt = register continaing the proto-VSID and into which the
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* VSID will be stored
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* rx = scratch register (clobbered)
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*
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* - rt and rx must be different registers
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* - The answer will end up in the low 36 bits of rt. The higher
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* bits may contain other garbage, so you may need to mask the
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* result.
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*/
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#define ASM_VSID_SCRAMBLE(rt, rx) \
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lis rx,VSID_MULTIPLIER@h; \
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ori rx,rx,VSID_MULTIPLIER@l; \
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mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
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\
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srdi rx,rt,VSID_BITS; \
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clrldi rt,rt,(64-VSID_BITS); \
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add rt,rt,rx; /* add high and low bits */ \
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/* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
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* 2^36-1+2^28-1. That in particular means that if r3 >= \
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* 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
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* the bit clear, r3 already has the answer we want, if it \
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* doesn't, the answer is the low 36 bits of r3+1. So in all \
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* cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
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addi rx,rt,1; \
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srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
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add rt,rt,rx
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#endif /* _PPC64_MMU_H_ */
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