177e9ea49d
pmc.c has: #ifndef MMCR0_PMA0 #define MMCR0_PMA0 0 This one took a while to find. Unfortunately its the wrong define (number 0 vs letter O). Its probably worth removing this override, since if our includes get screwed up we will have the same (hard to debug) failure. Fix it simply for now, so that we can backport to stable. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
/*
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* arch/powerpc/kernel/pmc.c
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*
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* Copyright (C) 2004 David Gibson, IBM Corporation.
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* Includes code formerly from arch/ppc/kernel/perfmon.c:
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* Author: Andy Fleming
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* Copyright (c) 2004 Freescale Semiconductor, Inc
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/pmc.h>
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#ifndef MMCR0_PMAO
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#define MMCR0_PMAO 0
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#endif
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static void dummy_perf(struct pt_regs *regs)
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{
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#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
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mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
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#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
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if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
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mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
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#else
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mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
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#endif
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}
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static DEFINE_SPINLOCK(pmc_owner_lock);
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static void *pmc_owner_caller; /* mostly for debugging */
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perf_irq_t perf_irq = dummy_perf;
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int reserve_pmc_hardware(perf_irq_t new_perf_irq)
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{
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int err = 0;
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spin_lock(&pmc_owner_lock);
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if (pmc_owner_caller) {
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printk(KERN_WARNING "reserve_pmc_hardware: "
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"PMC hardware busy (reserved by caller %p)\n",
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pmc_owner_caller);
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err = -EBUSY;
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goto out;
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}
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pmc_owner_caller = __builtin_return_address(0);
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perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
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out:
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spin_unlock(&pmc_owner_lock);
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return err;
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}
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EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
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void release_pmc_hardware(void)
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{
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spin_lock(&pmc_owner_lock);
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WARN_ON(! pmc_owner_caller);
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pmc_owner_caller = NULL;
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perf_irq = dummy_perf;
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spin_unlock(&pmc_owner_lock);
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}
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EXPORT_SYMBOL_GPL(release_pmc_hardware);
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#ifdef CONFIG_PPC64
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void power4_enable_pmcs(void)
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{
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unsigned long hid0;
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hid0 = mfspr(SPRN_HID0);
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hid0 |= 1UL << (63 - 20);
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/* POWER4 requires the following sequence */
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asm volatile(
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"sync\n"
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"mtspr %1, %0\n"
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"mfspr %0, %1\n"
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"mfspr %0, %1\n"
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"mfspr %0, %1\n"
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"mfspr %0, %1\n"
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"mfspr %0, %1\n"
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"mfspr %0, %1\n"
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"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
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"memory");
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}
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#endif /* CONFIG_PPC64 */
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