5a91d7c8a6
Currently, the MAC address from the second ethernet is generated from the crypto-key (and not a customer reg) because of a wrong index to the ocotp array. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
475 lines
14 KiB
C
475 lines
14 KiB
C
/*
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* Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <linux/clk.h>
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#include <linux/i2c.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <mach/common.h>
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#include <mach/iomux-mx28.h>
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#include <mach/digctl.h>
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#include "devices-mx28.h"
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#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
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#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
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#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
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#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
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#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
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#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
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#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
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#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
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#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
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#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
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static const iomux_cfg_t mx28evk_pads[] __initconst = {
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/* duart */
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MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
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MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
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/* auart0 */
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MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
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MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
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MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
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MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
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/* auart3 */
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MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
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MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
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MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
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MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
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#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
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/* fec0 */
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MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
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MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
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MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
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MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
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MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
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MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
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MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
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MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
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MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
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/* fec1 */
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MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
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MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
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MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
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MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
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MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
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MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
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/* phy power line */
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MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
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/* phy reset line */
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MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
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/* flexcan0 */
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MX28_PAD_GPMI_RDY2__CAN0_TX,
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MX28_PAD_GPMI_RDY3__CAN0_RX,
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/* flexcan1 */
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MX28_PAD_GPMI_CE2N__CAN1_TX,
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MX28_PAD_GPMI_CE3N__CAN1_RX,
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/* transceiver power control */
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MX28_PAD_SSP1_CMD__GPIO_2_13,
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/* mxsfb (lcdif) */
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MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
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MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
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MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
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MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
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MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
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MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
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/* LCD panel enable */
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MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
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/* backlight control */
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MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
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/* mmc0 */
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MX28_PAD_SSP0_DATA0__SSP0_D0 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA1__SSP0_D1 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA2__SSP0_D2 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA3__SSP0_D3 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA4__SSP0_D4 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA5__SSP0_D5 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA6__SSP0_D6 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DATA7__SSP0_D7 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_CMD__SSP0_CMD |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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MX28_PAD_SSP0_SCK__SSP0_SCK |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* write protect */
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MX28_PAD_SSP1_SCK__GPIO_2_12 |
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(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* slot power enable */
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MX28_PAD_PWM3__GPIO_3_28 |
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(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* mmc1 */
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MX28_PAD_GPMI_D00__SSP1_D0 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D01__SSP1_D1 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D02__SSP1_D2 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D03__SSP1_D3 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D04__SSP1_D4 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D05__SSP1_D5 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D06__SSP1_D6 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_D07__SSP1_D7 |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_RDY1__SSP1_CMD |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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MX28_PAD_GPMI_WRN__SSP1_SCK |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* write protect */
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MX28_PAD_GPMI_RESETN__GPIO_0_28 |
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(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* slot power enable */
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MX28_PAD_PWM4__GPIO_3_29 |
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(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
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/* led */
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MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
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/* I2C */
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MX28_PAD_I2C0_SCL__I2C0_SCL |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_I2C0_SDA__I2C0_SDA |
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(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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/* saif0 & saif1 */
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MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
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(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
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};
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/* led */
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static const struct gpio_led mx28evk_leds[] __initconst = {
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{
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.name = "GPIO-LED",
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.default_trigger = "heartbeat",
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.gpio = MX28EVK_GPIO_LED,
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},
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};
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static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
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.leds = mx28evk_leds,
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.num_leds = ARRAY_SIZE(mx28evk_leds),
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};
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/* fec */
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static void __init mx28evk_fec_reset(void)
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{
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struct clk *clk;
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/* Enable fec phy clock */
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clk = clk_get_sys("pll2", NULL);
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if (!IS_ERR(clk))
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clk_prepare_enable(clk);
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gpio_set_value(MX28EVK_FEC_PHY_RESET, 0);
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mdelay(1);
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gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
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}
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static struct fec_platform_data mx28_fec_pdata[] __initdata = {
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{
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/* fec0 */
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.phy = PHY_INTERFACE_MODE_RMII,
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}, {
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/* fec1 */
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.phy = PHY_INTERFACE_MODE_RMII,
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},
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};
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static int __init mx28evk_fec_get_mac(void)
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{
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int i;
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u32 val;
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const u32 *ocotp = mxs_get_ocotp();
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if (!ocotp)
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return -ETIMEDOUT;
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/*
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* OCOTP only stores the last 4 octets for each mac address,
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* so hard-code Freescale OUI (00:04:9f) here.
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*/
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for (i = 0; i < 2; i++) {
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val = ocotp[i];
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mx28_fec_pdata[i].mac[0] = 0x00;
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mx28_fec_pdata[i].mac[1] = 0x04;
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mx28_fec_pdata[i].mac[2] = 0x9f;
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mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
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mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
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mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
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}
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return 0;
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}
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/*
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* MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
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*/
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static int flexcan0_en, flexcan1_en;
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static void mx28evk_flexcan_switch(void)
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{
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if (flexcan0_en || flexcan1_en)
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gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
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else
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gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
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}
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static void mx28evk_flexcan0_switch(int enable)
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{
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flexcan0_en = enable;
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mx28evk_flexcan_switch();
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}
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static void mx28evk_flexcan1_switch(int enable)
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{
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flexcan1_en = enable;
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mx28evk_flexcan_switch();
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}
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static const struct flexcan_platform_data
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mx28evk_flexcan_pdata[] __initconst = {
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{
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.transceiver_switch = mx28evk_flexcan0_switch,
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}, {
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.transceiver_switch = mx28evk_flexcan1_switch,
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}
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};
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/* mxsfb (lcdif) */
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static struct fb_videomode mx28evk_video_modes[] = {
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{
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.name = "Seiko-43WVF1G",
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.refresh = 60,
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.xres = 800,
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.yres = 480,
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.pixclock = 29851, /* picosecond (33.5 MHz) */
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.left_margin = 89,
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.right_margin = 164,
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.upper_margin = 23,
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.lower_margin = 10,
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.hsync_len = 10,
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.vsync_len = 10,
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.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
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FB_SYNC_DOTCLK_FAILING_ACT,
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},
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};
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static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
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.mode_list = mx28evk_video_modes,
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.mode_count = ARRAY_SIZE(mx28evk_video_modes),
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.default_bpp = 32,
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.ld_intf_width = STMLCDIF_24BIT,
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};
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static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
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{
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/* mmc0 */
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.wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
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.flags = SLOTF_8_BIT_CAPABLE,
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}, {
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/* mmc1 */
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.wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
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.flags = SLOTF_8_BIT_CAPABLE,
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},
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};
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static struct i2c_board_info mxs_i2c0_board_info[] __initdata = {
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{
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I2C_BOARD_INFO("sgtl5000", 0x0a),
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},
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};
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#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
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static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = {
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REGULATOR_SUPPLY("VDDA", "0-000a"),
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REGULATOR_SUPPLY("VDDIO", "0-000a"),
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};
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static struct regulator_init_data mx28evk_vdd_reg_init_data = {
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.constraints = {
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.name = "3V3",
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.always_on = 1,
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},
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.consumer_supplies = mx28evk_audio_consumer_supplies,
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.num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies),
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};
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static struct fixed_voltage_config mx28evk_vdd_pdata = {
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.supply_name = "board-3V3",
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.microvolts = 3300000,
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.gpio = -EINVAL,
|
|
.enabled_at_boot = 1,
|
|
.init_data = &mx28evk_vdd_reg_init_data,
|
|
};
|
|
static struct platform_device mx28evk_voltage_regulator = {
|
|
.name = "reg-fixed-voltage",
|
|
.id = -1,
|
|
.num_resources = 0,
|
|
.dev = {
|
|
.platform_data = &mx28evk_vdd_pdata,
|
|
},
|
|
};
|
|
static void __init mx28evk_add_regulators(void)
|
|
{
|
|
platform_device_register(&mx28evk_voltage_regulator);
|
|
}
|
|
#else
|
|
static void __init mx28evk_add_regulators(void) {}
|
|
#endif
|
|
|
|
static const struct gpio mx28evk_gpios[] __initconst = {
|
|
{ MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
|
|
{ MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
|
|
{ MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, "flexcan-switch" },
|
|
{ MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc0-slot-power" },
|
|
{ MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc1-slot-power" },
|
|
{ MX28EVK_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
|
|
{ MX28EVK_FEC_PHY_RESET, GPIOF_DIR_OUT, "fec-phy-reset" },
|
|
};
|
|
|
|
static const struct mxs_saif_platform_data
|
|
mx28evk_mxs_saif_pdata[] __initconst = {
|
|
/* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
|
|
{
|
|
.master_mode = 1,
|
|
.master_id = 0,
|
|
}, {
|
|
.master_mode = 0,
|
|
.master_id = 0,
|
|
},
|
|
};
|
|
|
|
static void __init mx28evk_init(void)
|
|
{
|
|
int ret;
|
|
|
|
mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
|
|
|
|
mx28_add_duart();
|
|
mx28_add_auart0();
|
|
mx28_add_auart3();
|
|
|
|
if (mx28evk_fec_get_mac())
|
|
pr_warn("%s: failed on fec mac setup\n", __func__);
|
|
|
|
ret = gpio_request_array(mx28evk_gpios, ARRAY_SIZE(mx28evk_gpios));
|
|
if (ret)
|
|
pr_err("One or more GPIOs failed to be requested: %d\n", ret);
|
|
|
|
mx28evk_fec_reset();
|
|
mx28_add_fec(0, &mx28_fec_pdata[0]);
|
|
mx28_add_fec(1, &mx28_fec_pdata[1]);
|
|
|
|
mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
|
|
mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
|
|
|
|
mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
|
|
|
|
mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
|
|
mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
|
|
mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
|
|
|
|
mx28_add_mxs_i2c(0);
|
|
i2c_register_board_info(0, mxs_i2c0_board_info,
|
|
ARRAY_SIZE(mxs_i2c0_board_info));
|
|
|
|
mx28evk_add_regulators();
|
|
|
|
mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0,
|
|
NULL, 0);
|
|
|
|
mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
|
|
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
|
|
|
|
mx28_add_rtc_stmp3xxx();
|
|
|
|
gpio_led_register_device(0, &mx28evk_led_data);
|
|
}
|
|
|
|
static void __init mx28evk_timer_init(void)
|
|
{
|
|
mx28_clocks_init();
|
|
}
|
|
|
|
static struct sys_timer mx28evk_timer = {
|
|
.init = mx28evk_timer_init,
|
|
};
|
|
|
|
MACHINE_START(MX28EVK, "Freescale MX28 EVK")
|
|
/* Maintainer: Freescale Semiconductor, Inc. */
|
|
.map_io = mx28_map_io,
|
|
.init_irq = mx28_init_irq,
|
|
.timer = &mx28evk_timer,
|
|
.init_machine = mx28evk_init,
|
|
.restart = mxs_restart,
|
|
MACHINE_END
|