29ce3785b2
PARISC bootup triggers the warning at kernel/cpu/idle.c:96. That's caused by the weak arch_cpu_idle() implementation, which is provided to avoid that architectures implement idle_poll over and over. The switchover to polling mode happens in the first call of the weak arch_cpu_idle() implementation, but that code fails to reenable interrupts and therefor triggers the warning. Fix this by enabling interrupts in the weak arch_cpu_idle() code. [ tglx: Made the changelog match the patch ] Signed-off-by: James Bottomley <JBottomley@Parallels.com> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Link: http://lkml.kernel.org/r/1371236142.2726.43.camel@dabdike Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
135 lines
3 KiB
C
135 lines
3 KiB
C
/*
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* Generic entry point for the idle threads
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*/
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#include <linux/sched.h>
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#include <linux/cpu.h>
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#include <linux/tick.h>
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#include <linux/mm.h>
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#include <linux/stackprotector.h>
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#include <asm/tlb.h>
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#include <trace/events/power.h>
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static int __read_mostly cpu_idle_force_poll;
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void cpu_idle_poll_ctrl(bool enable)
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{
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if (enable) {
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cpu_idle_force_poll++;
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} else {
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cpu_idle_force_poll--;
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WARN_ON_ONCE(cpu_idle_force_poll < 0);
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}
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}
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#ifdef CONFIG_GENERIC_IDLE_POLL_SETUP
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static int __init cpu_idle_poll_setup(char *__unused)
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{
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cpu_idle_force_poll = 1;
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return 1;
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}
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__setup("nohlt", cpu_idle_poll_setup);
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static int __init cpu_idle_nopoll_setup(char *__unused)
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{
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cpu_idle_force_poll = 0;
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return 1;
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}
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__setup("hlt", cpu_idle_nopoll_setup);
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#endif
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static inline int cpu_idle_poll(void)
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{
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rcu_idle_enter();
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trace_cpu_idle_rcuidle(0, smp_processor_id());
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local_irq_enable();
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while (!need_resched())
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cpu_relax();
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trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
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rcu_idle_exit();
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return 1;
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}
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/* Weak implementations for optional arch specific functions */
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void __weak arch_cpu_idle_prepare(void) { }
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void __weak arch_cpu_idle_enter(void) { }
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void __weak arch_cpu_idle_exit(void) { }
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void __weak arch_cpu_idle_dead(void) { }
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void __weak arch_cpu_idle(void)
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{
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cpu_idle_force_poll = 1;
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local_irq_enable();
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}
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/*
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* Generic idle loop implementation
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*/
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static void cpu_idle_loop(void)
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{
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while (1) {
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tick_nohz_idle_enter();
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while (!need_resched()) {
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check_pgt_cache();
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rmb();
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if (cpu_is_offline(smp_processor_id()))
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arch_cpu_idle_dead();
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local_irq_disable();
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arch_cpu_idle_enter();
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/*
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* In poll mode we reenable interrupts and spin.
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*
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* Also if we detected in the wakeup from idle
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* path that the tick broadcast device expired
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* for us, we don't want to go deep idle as we
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* know that the IPI is going to arrive right
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* away
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*/
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if (cpu_idle_force_poll || tick_check_broadcast_expired()) {
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cpu_idle_poll();
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} else {
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current_clr_polling();
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if (!need_resched()) {
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stop_critical_timings();
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rcu_idle_enter();
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arch_cpu_idle();
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WARN_ON_ONCE(irqs_disabled());
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rcu_idle_exit();
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start_critical_timings();
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} else {
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local_irq_enable();
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}
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current_set_polling();
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}
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arch_cpu_idle_exit();
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}
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tick_nohz_idle_exit();
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schedule_preempt_disabled();
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}
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}
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void cpu_startup_entry(enum cpuhp_state state)
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{
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/*
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* This #ifdef needs to die, but it's too late in the cycle to
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* make this generic (arm and sh have never invoked the canary
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* init for the non boot cpus!). Will be fixed in 3.11
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*/
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#ifdef CONFIG_X86
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/*
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* If we're the non-boot CPU, nothing set the stack canary up
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* for us. The boot CPU already has it initialized but no harm
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* in doing it again. This is a good place for updating it, as
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* we wont ever return from this function (so the invalid
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* canaries already on the stack wont ever trigger).
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*/
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boot_init_stack_canary();
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#endif
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current_set_polling();
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arch_cpu_idle_prepare();
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cpu_idle_loop();
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}
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