kernel-fxtec-pro1x/arch/cris/arch-v32/kernel/cacheflush.S
Jesper Nilsson 57c230a873 CRISv32: add cache flush operations
These are needed due to a cache bug, and can be used to make sure that the
DMA descriptors are flushed to memory and can be safely handled by DMA.

flush_dma_descr - Flush one DMA descriptor.
flush_dma_list - Flush a complete list of DMA descriptors.
cris_flush_cache - Flush the complete cache.
cris_flush_cache_range - Flush only the specified range

Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-14 18:45:47 -08:00

94 lines
1.4 KiB
ArmAsm

.global cris_flush_cache_range
cris_flush_cache_range:
move.d 1024, $r12
cmp.d $r11, $r12
bhi cris_flush_1KB
nop
add.d $r10, $r11
ftagd [$r10]
cris_flush_last:
addq 32, $r10
cmp.d $r11, $r10
blt cris_flush_last
ftagd [$r10]
ret
nop
cris_flush_1KB:
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ftagd [$r10]
addq 32, $r10
ba cris_flush_cache_range
sub.d $r12, $r11
.global cris_flush_cache
cris_flush_cache:
moveq 0, $r10
cris_flush_line:
move.d 16*1024, $r11
addq 16, $r10
cmp.d $r10, $r11
blt cris_flush_line
fidxd [$r10]
ret
nop