6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
173 lines
4 KiB
ArmAsm
173 lines
4 KiB
ArmAsm
/* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation
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*
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* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/threads.h>
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#include <linux/linkage.h>
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#include <asm/ptrace.h>
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#include <asm/page.h>
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#include <asm/spr-regs.h>
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#include <asm/mb86943a.h>
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#include "head.inc"
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#define __400_DBR0 0xfe000e00
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#define __400_DBR1 0xfe000e08
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#define __400_DBR2 0xfe000e10
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#define __400_DBR3 0xfe000e18
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#define __400_DAM0 0xfe000f00
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#define __400_DAM1 0xfe000f08
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#define __400_DAM2 0xfe000f10
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#define __400_DAM3 0xfe000f18
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#define __400_LGCR 0xfe000010
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#define __400_LCR 0xfe000100
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#define __400_LSBR 0xfe000c00
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.section .text.init,"ax"
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.balign 4
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###############################################################################
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#
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# set the protection map with the I/DAMPR registers
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#
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# ENTRY: EXIT:
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# GR25 SDRAM size [saved]
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# GR26 &__head_reference [saved]
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# GR30 LED address [saved]
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#
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###############################################################################
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.globl __head_fr451_set_protection
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__head_fr451_set_protection:
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movsg lr,gr27
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movgs gr0,dampr10
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movgs gr0,damlr10
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movgs gr0,dampr9
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movgs gr0,damlr9
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movgs gr0,dampr8
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movgs gr0,damlr8
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# set the I/O region protection registers for FR401/3/5
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sethi.p %hi(__region_IO),gr5
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setlo %lo(__region_IO),gr5
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sethi.p %hi(0x1fffffff),gr7
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setlo %lo(0x1fffffff),gr7
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ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5
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movgs gr5,dampr11 ; General I/O tile
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movgs gr7,damlr11
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# need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
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# - start with the highest numbered registers
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sethi.p %hi(__kernel_image_end),gr8
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setlo %lo(__kernel_image_end),gr8
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sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap
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setlo %lo(32768),gr4
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add gr8,gr4,gr8
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sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB
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setlo %lo(1024*2048-1),gr4
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add.p gr8,gr4,gr8
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not gr4,gr4
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and gr8,gr4,gr8
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sethi.p %hi(__page_offset),gr9
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setlo %lo(__page_offset),gr9
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add gr9,gr25,gr9
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sethi.p %hi(0xffffc000),gr11
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setlo %lo(0xffffc000),gr11
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# GR8 = base of uncovered RAM
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# GR9 = top of uncovered RAM
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# GR11 = xAMLR mask
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LEDS 0x3317
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call __head_split_region
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movgs gr4,iampr7
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movgs gr6,iamlr7
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movgs gr5,dampr7
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movgs gr7,damlr7
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LEDS 0x3316
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call __head_split_region
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movgs gr4,iampr6
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movgs gr6,iamlr6
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movgs gr5,dampr6
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movgs gr7,damlr6
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LEDS 0x3315
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call __head_split_region
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movgs gr4,iampr5
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movgs gr6,iamlr5
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movgs gr5,dampr5
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movgs gr7,damlr5
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LEDS 0x3314
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call __head_split_region
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movgs gr4,iampr4
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movgs gr6,iamlr4
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movgs gr5,dampr4
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movgs gr7,damlr4
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LEDS 0x3313
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call __head_split_region
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movgs gr4,iampr3
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movgs gr6,iamlr3
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movgs gr5,dampr3
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movgs gr7,damlr3
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LEDS 0x3312
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call __head_split_region
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movgs gr4,iampr2
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movgs gr6,iamlr2
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movgs gr5,dampr2
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movgs gr7,damlr2
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LEDS 0x3311
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call __head_split_region
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movgs gr4,iampr1
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movgs gr6,iamlr1
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movgs gr5,dampr1
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movgs gr7,damlr1
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# cover kernel core image with kernel-only segment
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LEDS 0x3310
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sethi.p %hi(__page_offset),gr8
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setlo %lo(__page_offset),gr8
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call __head_split_region
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#ifdef CONFIG_PROTECT_KERNEL
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ori.p gr4,#xAMPRx_S_KERNEL,gr4
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ori gr5,#xAMPRx_S_KERNEL,gr5
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#endif
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movgs gr4,iampr0
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movgs gr6,iamlr0
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movgs gr5,dampr0
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movgs gr7,damlr0
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# start in TLB context 0 with no page tables
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movgs gr0,cxnr
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movgs gr0,ttbr
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# the FR451 also has an extra trap base register
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movsg tbr,gr4
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movgs gr4,btbr
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# turn on the timers as appropriate
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movgs gr0,timerh
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movgs gr0,timerl
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movgs gr0,timerd
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movsg hsr0,gr4
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sethi.p %hi(HSR0_ETMI),gr5
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setlo %lo(HSR0_ETMI),gr5
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or gr4,gr5,gr4
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movgs gr4,hsr0
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LEDS 0x3300
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jmpl @(gr27,gr0)
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