7847777a45
After changing all consumers of atomics to include <linux/atomic.h>, we ran into some compile time errors due to this dependency chain: linux/atomic.h -> asm/atomic.h -> asm-generic/atomic-long.h where atomic-long.h could use funcs defined later in linux/atomic.h without a prototype. This patches moves the code that includes asm-generic/atomic*.h to linux/atomic.h. Archs that need <asm-generic/atomic64.h> need to select CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it unconditionally). Compile tested on i386 and x86_64 with allnoconfig. Signed-off-by: Arun Sharma <asharma@fb.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
117 lines
2.9 KiB
C
117 lines
2.9 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ARCH_BLACKFIN_ATOMIC__
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#define __ARCH_BLACKFIN_ATOMIC__
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#ifndef CONFIG_SMP
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# include <asm-generic/atomic.h>
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#else
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#include <linux/types.h>
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#include <asm/system.h> /* local_irq_XXX() */
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_set(v, i) (((v)->counter) = i)
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#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
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asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
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asmlinkage int __raw_atomic_update_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_clear_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_set_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_xor_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
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static inline void atomic_add(int i, atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, i);
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, -i);
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __raw_atomic_update_asm(&v->counter, i);
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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return __raw_atomic_update_asm(&v->counter, -i);
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}
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static inline void atomic_inc(volatile atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, 1);
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}
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static inline void atomic_dec(volatile atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, -1);
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}
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static inline void atomic_clear_mask(int mask, atomic_t *v)
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{
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__raw_atomic_clear_asm(&v->counter, mask);
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}
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static inline void atomic_set_mask(int mask, atomic_t *v)
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{
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__raw_atomic_set_asm(&v->counter, mask);
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}
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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#define atomic_dec_return(v) atomic_sub_return(1,(v))
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#define atomic_inc_return(v) atomic_add_return(1,(v))
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#define __atomic_add_unless(v, a, u) \
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({ \
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int c, old; \
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c = atomic_read(v); \
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while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
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c = old; \
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c; \
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})
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
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#endif
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#endif
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