504d4721ee
This patch adds the driver for the ETOP Packet Processing Engine (PPE32) found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit ethernet work. Support for all 8 dma channels, gbit and the embedded switch found on the ar9/vr9 still needs to be implemented. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2357/ Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
121 lines
2.8 KiB
C
121 lines
2.8 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/mtd/physmap.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <linux/platform_device.h>
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#include <linux/leds.h>
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#include <linux/etherdevice.h>
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#include <linux/reboot.h>
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#include <linux/time.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <lantiq_soc.h>
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#include <lantiq_irq.h>
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#include <lantiq_platform.h>
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#include "devices.h"
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/* gpio */
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static struct resource ltq_gpio_resource[] = {
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{
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.name = "gpio0",
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.start = LTQ_GPIO0_BASE_ADDR,
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.end = LTQ_GPIO0_BASE_ADDR + LTQ_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "gpio1",
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.start = LTQ_GPIO1_BASE_ADDR,
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.end = LTQ_GPIO1_BASE_ADDR + LTQ_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "gpio2",
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.start = LTQ_GPIO2_BASE_ADDR,
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.end = LTQ_GPIO2_BASE_ADDR + LTQ_GPIO_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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void __init ltq_register_gpio(void)
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{
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platform_device_register_simple("ltq_gpio", 0,
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<q_gpio_resource[0], 1);
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platform_device_register_simple("ltq_gpio", 1,
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<q_gpio_resource[1], 1);
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/* AR9 and VR9 have an extra gpio block */
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if (ltq_is_ar9() || ltq_is_vr9()) {
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platform_device_register_simple("ltq_gpio", 2,
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<q_gpio_resource[2], 1);
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}
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}
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/* serial to parallel conversion */
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static struct resource ltq_stp_resource = {
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.name = "stp",
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.start = LTQ_STP_BASE_ADDR,
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.end = LTQ_STP_BASE_ADDR + LTQ_STP_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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void __init ltq_register_gpio_stp(void)
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{
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platform_device_register_simple("ltq_stp", 0, <q_stp_resource, 1);
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}
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/* asc ports - amazon se has its own serial mapping */
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static struct resource ltq_ase_asc_resources[] = {
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{
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.name = "asc0",
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.start = LTQ_ASC1_BASE_ADDR,
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.end = LTQ_ASC1_BASE_ADDR + LTQ_ASC_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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IRQ_RES(tx, LTQ_ASC_ASE_TIR),
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IRQ_RES(rx, LTQ_ASC_ASE_RIR),
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IRQ_RES(err, LTQ_ASC_ASE_EIR),
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};
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void __init ltq_register_ase_asc(void)
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{
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platform_device_register_simple("ltq_asc", 0,
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ltq_ase_asc_resources, ARRAY_SIZE(ltq_ase_asc_resources));
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}
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/* ethernet */
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static struct resource ltq_etop_resources = {
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.name = "etop",
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.start = LTQ_ETOP_BASE_ADDR,
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.end = LTQ_ETOP_BASE_ADDR + LTQ_ETOP_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device ltq_etop = {
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.name = "ltq_etop",
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.resource = <q_etop_resources,
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.num_resources = 1,
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};
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void __init
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ltq_register_etop(struct ltq_eth_data *eth)
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{
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if (eth) {
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ltq_etop.dev.platform_data = eth;
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platform_device_register(<q_etop);
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}
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}
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