174 lines
4.9 KiB
C
174 lines
4.9 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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* Alchemy Pb1200/Db1200 board setup.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-db1x00/bcsr.h>
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#ifdef CONFIG_MIPS_PB1200
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#include <asm/mach-pb1x00/pb1200.h>
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#endif
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#ifdef CONFIG_MIPS_DB1200
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#include <asm/mach-db1x00/db1200.h>
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#define PB1200_INT_BEGIN DB1200_INT_BEGIN
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#define PB1200_INT_END DB1200_INT_END
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#endif
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#include <prom.h>
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const char *get_system_type(void)
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{
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return "Alchemy Pb1200";
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}
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void __init board_setup(void)
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{
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printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
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bcsr_init(PB1200_BCSR_PHYS_ADDR,
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PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
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#if 0
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{
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u32 pin_func;
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/*
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* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
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* but it is board specific code, so put it here.
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*/
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pin_func = au_readl(SYS_PINFUNC);
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au_sync();
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pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
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au_writel(pin_func, SYS_PINFUNC);
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au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
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au_sync();
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}
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#endif
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#if defined(CONFIG_I2C_AU1550)
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{
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u32 freq0, clksrc;
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u32 pin_func;
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/* Select SMBus in CPLD */
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bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
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pin_func = au_readl(SYS_PINFUNC);
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au_sync();
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pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
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/* Set GPIOs correctly */
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pin_func |= 2 << 17;
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au_writel(pin_func, SYS_PINFUNC);
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au_sync();
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/* The I2C driver depends on 50 MHz clock */
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freq0 = au_readl(SYS_FREQCTRL0);
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au_sync();
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freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
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freq0 |= 3 << SYS_FC_FRDIV1_BIT;
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/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
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au_writel(freq0, SYS_FREQCTRL0);
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au_sync();
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freq0 |= SYS_FC_FE1;
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au_writel(freq0, SYS_FREQCTRL0);
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au_sync();
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clksrc = au_readl(SYS_CLKSRC);
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au_sync();
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clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
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/* Bit 22 is EXTCLK0 for PSC0 */
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clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
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au_writel(clksrc, SYS_CLKSRC);
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au_sync();
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}
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#endif
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/*
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* The Pb1200 development board uses external MUX for PSC0 to
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* support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
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*/
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#ifdef CONFIG_I2C_AU1550
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bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
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#endif
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au_sync();
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}
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static int __init pb1200_init_irq(void)
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{
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/* We have a problem with CPLD rev 3. */
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if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
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printk(KERN_ERR "updated to latest revision. This software will\n");
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printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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printk(KERN_ERR "WARNING!!!\n");
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panic("Game over. Your score is 0.");
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}
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irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
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bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
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return 0;
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}
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arch_initcall(pb1200_init_irq);
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int board_au1200fb_panel(void)
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{
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return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
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}
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int board_au1200fb_panel_init(void)
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{
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/* Apply power */
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bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
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BCSR_BOARD_LCDBL);
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/* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
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return 0;
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}
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int board_au1200fb_panel_shutdown(void)
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{
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/* Remove power */
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bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
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BCSR_BOARD_LCDBL, 0);
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/* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
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return 0;
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}
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