d6460827af
Updated db1200_defconfig so pcmcia is enabled by default. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
149 lines
4.2 KiB
C
149 lines
4.2 KiB
C
/*
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* Alchemy Semi Au1000 pcmcia driver include file
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#ifndef __ASM_AU1000_PCMCIA_H
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#define __ASM_AU1000_PCMCIA_H
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/* include the world */
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/bulkmem.h>
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#include <pcmcia/cistpl.h>
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#include "cs_internal.h"
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#define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
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#define AU1000_PCMCIA_IO_SPEED (255)
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#define AU1000_PCMCIA_MEM_SPEED (300)
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#define AU1X_SOCK0_IO 0xF00000000
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#define AU1X_SOCK0_PHYS_ATTR 0xF40000000
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#define AU1X_SOCK0_PHYS_MEM 0xF80000000
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/* pseudo 32 bit phys addresses, which get fixed up to the
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* real 36 bit address in fixup_bigphys_addr() */
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#define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
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#define AU1X_SOCK0_PSEUDO_PHYS_MEM 0xF8000000
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/* pcmcia socket 1 needs external glue logic so the memory map
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* differs from board to board.
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*/
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#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_PB1200)
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#define AU1X_SOCK1_IO 0xF08000000
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#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
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#define AU1X_SOCK1_PHYS_MEM 0xF88000000
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#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
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#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
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#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || defined(CONFIG_MIPS_DB1200)
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#define AU1X_SOCK1_IO 0xF04000000
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#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
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#define AU1X_SOCK1_PHYS_MEM 0xF84000000
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#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
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#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000
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#endif
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struct pcmcia_state {
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unsigned detect: 1,
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ready: 1,
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wrprot: 1,
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bvd1: 1,
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bvd2: 1,
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vs_3v: 1,
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vs_Xv: 1;
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};
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struct pcmcia_configure {
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unsigned sock: 8,
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vcc: 8,
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vpp: 8,
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output: 1,
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speaker: 1,
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reset: 1;
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};
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struct pcmcia_irqs {
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int sock;
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int irq;
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const char *str;
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};
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struct au1000_pcmcia_socket {
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struct pcmcia_socket socket;
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/*
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* Info from low level handler
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*/
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struct device *dev;
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unsigned int nr;
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unsigned int irq;
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/*
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* Core PCMCIA state
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*/
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struct pcmcia_low_level *ops;
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unsigned int status;
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socket_state_t cs_state;
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unsigned short spd_io[MAX_IO_WIN];
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unsigned short spd_mem[MAX_WIN];
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unsigned short spd_attr[MAX_WIN];
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struct resource res_skt;
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struct resource res_io;
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struct resource res_mem;
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struct resource res_attr;
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void * virt_io;
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ioaddr_t phys_io;
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unsigned int phys_attr;
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unsigned int phys_mem;
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unsigned short speed_io, speed_attr, speed_mem;
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unsigned int irq_state;
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struct timer_list poll_timer;
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};
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struct pcmcia_low_level {
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struct module *owner;
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int (*hw_init)(struct au1000_pcmcia_socket *);
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void (*hw_shutdown)(struct au1000_pcmcia_socket *);
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void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *);
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int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *);
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/*
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* Enable card status IRQs on (re-)initialisation. This can
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* be called at initialisation, power management event, or
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* pcmcia event.
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*/
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void (*socket_init)(struct au1000_pcmcia_socket *);
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/*
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* Disable card status IRQs and PCMCIA bus on suspend.
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*/
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void (*socket_suspend)(struct au1000_pcmcia_socket *);
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};
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extern int au1x_board_init(struct device *dev);
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#endif /* __ASM_AU1000_PCMCIA_H */
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