17512dc3b7
The patch "Implement set_tim callback for all drivers" can cause kernel oops in rt73usb_write_beacon. The oops is caused by one of the following race conditions: * In case of two near calls to set_tim: rt2x00lib_beacondone_iter is cleaning the beacon skb, whereas rt73usb_write_beacon is still using it. * In case of two near updates of beacon: first as the result of set_tim and second as the result of a call from an application (e.g. hostapd). This patch fixes the race condition by rearranging the update logic and guarding rt2x00_intf->beacon->skb with a mutex. Signed-off-by: Igor Perminov <igor.perminov@inbox.ru> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
870 lines
23 KiB
C
870 lines
23 KiB
C
/*
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Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00lib
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Abstract: rt2x00 queue specific routines.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include "rt2x00.h"
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#include "rt2x00lib.h"
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struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
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struct queue_entry *entry)
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{
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struct sk_buff *skb;
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struct skb_frame_desc *skbdesc;
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unsigned int frame_size;
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unsigned int head_size = 0;
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unsigned int tail_size = 0;
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/*
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* The frame size includes descriptor size, because the
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* hardware directly receive the frame into the skbuffer.
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*/
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frame_size = entry->queue->data_size + entry->queue->desc_size;
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/*
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* The payload should be aligned to a 4-byte boundary,
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* this means we need at least 3 bytes for moving the frame
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* into the correct offset.
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*/
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head_size = 4;
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/*
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* For IV/EIV/ICV assembly we must make sure there is
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* at least 8 bytes bytes available in headroom for IV/EIV
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* and 8 bytes for ICV data as tailroon.
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*/
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if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
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head_size += 8;
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tail_size += 8;
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}
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/*
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* Allocate skbuffer.
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*/
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skb = dev_alloc_skb(frame_size + head_size + tail_size);
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if (!skb)
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return NULL;
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/*
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* Make sure we not have a frame with the requested bytes
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* available in the head and tail.
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*/
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skb_reserve(skb, head_size);
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skb_put(skb, frame_size);
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/*
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* Populate skbdesc.
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*/
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skbdesc = get_skb_frame_desc(skb);
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memset(skbdesc, 0, sizeof(*skbdesc));
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skbdesc->entry = entry;
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if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
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skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
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skb->data,
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skb->len,
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DMA_FROM_DEVICE);
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skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
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}
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return skb;
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}
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void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
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/*
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* If device has requested headroom, we should make sure that
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* is also mapped to the DMA so it can be used for transfering
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* additional descriptor information to the hardware.
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*/
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skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
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skbdesc->skb_dma =
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dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
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/*
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* Restore data pointer to original location again.
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*/
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skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
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skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
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void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
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if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
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dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
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DMA_FROM_DEVICE);
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skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
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}
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if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
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/*
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* Add headroom to the skb length, it has been removed
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* by the driver, but it was actually mapped to DMA.
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*/
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dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
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skb->len + rt2x00dev->hw->extra_tx_headroom,
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DMA_TO_DEVICE);
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skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
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}
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}
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void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
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{
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if (!skb)
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return;
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rt2x00queue_unmap_skb(rt2x00dev, skb);
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dev_kfree_skb_any(skb);
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}
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void rt2x00queue_payload_align(struct sk_buff *skb,
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bool l2pad, unsigned int header_length)
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{
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
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unsigned int frame_length = skb->len;
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unsigned int align = ALIGN_SIZE(skb, header_length);
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if (!align)
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return;
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if (l2pad) {
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if (skbdesc->flags & SKBDESC_L2_PADDED) {
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/* Remove L2 padding */
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memmove(skb->data + align, skb->data, header_length);
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skb_pull(skb, align);
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skbdesc->flags &= ~SKBDESC_L2_PADDED;
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} else {
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/* Add L2 padding */
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skb_push(skb, align);
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memmove(skb->data, skb->data + align, header_length);
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skbdesc->flags |= SKBDESC_L2_PADDED;
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}
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} else {
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/* Generic payload alignment to 4-byte boundary */
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skb_push(skb, align);
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memmove(skb->data, skb->data + align, frame_length);
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}
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}
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static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
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struct txentry_desc *txdesc)
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{
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
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struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
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unsigned long irqflags;
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if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
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unlikely(!tx_info->control.vif))
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return;
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/*
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* Hardware should insert sequence counter.
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* FIXME: We insert a software sequence counter first for
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* hardware that doesn't support hardware sequence counting.
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*
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* This is wrong because beacons are not getting sequence
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* numbers assigned properly.
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*
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* A secondary problem exists for drivers that cannot toggle
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* sequence counting per-frame, since those will override the
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* sequence counter given by mac80211.
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*/
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spin_lock_irqsave(&intf->seqlock, irqflags);
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if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
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intf->seqno += 0x10;
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hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
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hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
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spin_unlock_irqrestore(&intf->seqlock, irqflags);
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__set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
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}
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static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
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struct txentry_desc *txdesc,
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const struct rt2x00_rate *hwrate)
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{
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struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
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struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
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unsigned int data_length;
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unsigned int duration;
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unsigned int residual;
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/* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
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data_length = entry->skb->len + 4;
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data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
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/*
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* PLCP setup
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* Length calculation depends on OFDM/CCK rate.
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*/
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txdesc->signal = hwrate->plcp;
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txdesc->service = 0x04;
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if (hwrate->flags & DEV_RATE_OFDM) {
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txdesc->length_high = (data_length >> 6) & 0x3f;
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txdesc->length_low = data_length & 0x3f;
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} else {
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/*
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* Convert length to microseconds.
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*/
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residual = GET_DURATION_RES(data_length, hwrate->bitrate);
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duration = GET_DURATION(data_length, hwrate->bitrate);
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if (residual != 0) {
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duration++;
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/*
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* Check if we need to set the Length Extension
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*/
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if (hwrate->bitrate == 110 && residual <= 30)
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txdesc->service |= 0x80;
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}
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txdesc->length_high = (duration >> 8) & 0xff;
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txdesc->length_low = duration & 0xff;
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/*
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* When preamble is enabled we should set the
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* preamble bit for the signal.
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*/
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if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
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txdesc->signal |= 0x08;
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}
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}
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static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
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struct txentry_desc *txdesc)
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{
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struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
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struct ieee80211_rate *rate =
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ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
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const struct rt2x00_rate *hwrate;
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memset(txdesc, 0, sizeof(*txdesc));
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/*
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* Initialize information from queue
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*/
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txdesc->queue = entry->queue->qid;
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txdesc->cw_min = entry->queue->cw_min;
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txdesc->cw_max = entry->queue->cw_max;
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txdesc->aifs = entry->queue->aifs;
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/*
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* Header and alignment information.
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*/
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txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
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txdesc->l2pad = ALIGN_SIZE(entry->skb, txdesc->header_length);
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/*
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* Check whether this frame is to be acked.
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*/
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if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
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__set_bit(ENTRY_TXD_ACK, &txdesc->flags);
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/*
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* Check if this is a RTS/CTS frame
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*/
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if (ieee80211_is_rts(hdr->frame_control) ||
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ieee80211_is_cts(hdr->frame_control)) {
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__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
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if (ieee80211_is_rts(hdr->frame_control))
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__set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
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else
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__set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
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if (tx_info->control.rts_cts_rate_idx >= 0)
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rate =
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ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
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}
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/*
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* Determine retry information.
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*/
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txdesc->retry_limit = tx_info->control.rates[0].count - 1;
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if (txdesc->retry_limit >= rt2x00dev->long_retry)
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__set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
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/*
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* Check if more fragments are pending
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*/
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if (ieee80211_has_morefrags(hdr->frame_control) ||
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(tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
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__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
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__set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
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}
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/*
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* Beacons and probe responses require the tsf timestamp
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* to be inserted into the frame.
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*/
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if (ieee80211_is_beacon(hdr->frame_control) ||
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ieee80211_is_probe_resp(hdr->frame_control))
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__set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
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/*
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* Determine with what IFS priority this frame should be send.
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* Set ifs to IFS_SIFS when the this is not the first fragment,
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* or this fragment came after RTS/CTS.
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*/
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if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
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!test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
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__set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
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txdesc->ifs = IFS_BACKOFF;
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} else
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txdesc->ifs = IFS_SIFS;
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/*
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* Determine rate modulation.
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*/
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hwrate = rt2x00_get_rate(rate->hw_value);
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txdesc->rate_mode = RATE_MODE_CCK;
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if (hwrate->flags & DEV_RATE_OFDM)
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txdesc->rate_mode = RATE_MODE_OFDM;
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/*
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* Apply TX descriptor handling by components
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*/
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rt2x00crypto_create_tx_descriptor(entry, txdesc);
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rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
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rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
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rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
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}
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static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
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struct txentry_desc *txdesc)
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{
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struct data_queue *queue = entry->queue;
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struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
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rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
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/*
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* All processing on the frame has been completed, this means
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* it is now ready to be dumped to userspace through debugfs.
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*/
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rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
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/*
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* Check if we need to kick the queue, there are however a few rules
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* 1) Don't kick beacon queue
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* 2) Don't kick unless this is the last in frame in a burst.
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* When the burst flag is set, this frame is always followed
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* by another frame which in some way are related to eachother.
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* This is true for fragments, RTS or CTS-to-self frames.
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* 3) Rule 2 can be broken when the available entries
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* in the queue are less then a certain threshold.
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*/
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if (entry->queue->qid == QID_BEACON)
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return;
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if (rt2x00queue_threshold(queue) ||
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!test_bit(ENTRY_TXD_BURST, &txdesc->flags))
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rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
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}
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int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
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{
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struct ieee80211_tx_info *tx_info;
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struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
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struct txentry_desc txdesc;
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struct skb_frame_desc *skbdesc;
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u8 rate_idx, rate_flags;
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if (unlikely(rt2x00queue_full(queue)))
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return -ENOBUFS;
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if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
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ERROR(queue->rt2x00dev,
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"Arrived at non-free entry in the non-full queue %d.\n"
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"Please file bug report to %s.\n",
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queue->qid, DRV_PROJECT);
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return -EINVAL;
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}
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/*
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* Copy all TX descriptor information into txdesc,
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* after that we are free to use the skb->cb array
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* for our information.
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*/
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entry->skb = skb;
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rt2x00queue_create_tx_descriptor(entry, &txdesc);
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/*
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* All information is retrieved from the skb->cb array,
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* now we should claim ownership of the driver part of that
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* array, preserving the bitrate index and flags.
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*/
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tx_info = IEEE80211_SKB_CB(skb);
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rate_idx = tx_info->control.rates[0].idx;
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rate_flags = tx_info->control.rates[0].flags;
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skbdesc = get_skb_frame_desc(skb);
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memset(skbdesc, 0, sizeof(*skbdesc));
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skbdesc->entry = entry;
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skbdesc->tx_rate_idx = rate_idx;
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skbdesc->tx_rate_flags = rate_flags;
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/*
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* When hardware encryption is supported, and this frame
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* is to be encrypted, we should strip the IV/EIV data from
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* the frame so we can provide it to the driver seperately.
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*/
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if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
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!test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
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if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
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rt2x00crypto_tx_copy_iv(skb, &txdesc);
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else
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rt2x00crypto_tx_remove_iv(skb, &txdesc);
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}
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/*
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* When DMA allocation is required we should guarentee to the
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* driver that the DMA is aligned to a 4-byte boundary.
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* Aligning the header to this boundary can be done by calling
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* rt2x00queue_payload_align with the header length of 0.
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* However some drivers require L2 padding to pad the payload
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* rather then the header. This could be a requirement for
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* PCI and USB devices, while header alignment only is valid
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* for PCI devices.
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*/
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|
if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
|
|
rt2x00queue_payload_align(entry->skb, true,
|
|
txdesc.header_length);
|
|
else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
|
|
rt2x00queue_payload_align(entry->skb, false, 0);
|
|
|
|
/*
|
|
* It could be possible that the queue was corrupted and this
|
|
* call failed. Since we always return NETDEV_TX_OK to mac80211,
|
|
* this frame will simply be dropped.
|
|
*/
|
|
if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
|
|
clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
|
|
entry->skb = NULL;
|
|
return -EIO;
|
|
}
|
|
|
|
if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
|
|
rt2x00queue_map_txskb(queue->rt2x00dev, skb);
|
|
|
|
set_bit(ENTRY_DATA_PENDING, &entry->flags);
|
|
|
|
rt2x00queue_index_inc(queue, Q_INDEX);
|
|
rt2x00queue_write_tx_descriptor(entry, &txdesc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
|
|
struct ieee80211_vif *vif,
|
|
const bool enable_beacon)
|
|
{
|
|
struct rt2x00_intf *intf = vif_to_intf(vif);
|
|
struct skb_frame_desc *skbdesc;
|
|
struct txentry_desc txdesc;
|
|
__le32 desc[16];
|
|
|
|
if (unlikely(!intf->beacon))
|
|
return -ENOBUFS;
|
|
|
|
mutex_lock(&intf->beacon_skb_mutex);
|
|
|
|
/*
|
|
* Clean up the beacon skb.
|
|
*/
|
|
rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
|
|
intf->beacon->skb = NULL;
|
|
|
|
if (!enable_beacon) {
|
|
rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
|
|
mutex_unlock(&intf->beacon_skb_mutex);
|
|
return 0;
|
|
}
|
|
|
|
intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
|
|
if (!intf->beacon->skb) {
|
|
mutex_unlock(&intf->beacon_skb_mutex);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/*
|
|
* Copy all TX descriptor information into txdesc,
|
|
* after that we are free to use the skb->cb array
|
|
* for our information.
|
|
*/
|
|
rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
|
|
|
|
/*
|
|
* For the descriptor we use a local array from where the
|
|
* driver can move it to the correct location required for
|
|
* the hardware.
|
|
*/
|
|
memset(desc, 0, sizeof(desc));
|
|
|
|
/*
|
|
* Fill in skb descriptor
|
|
*/
|
|
skbdesc = get_skb_frame_desc(intf->beacon->skb);
|
|
memset(skbdesc, 0, sizeof(*skbdesc));
|
|
skbdesc->desc = desc;
|
|
skbdesc->desc_len = intf->beacon->queue->desc_size;
|
|
skbdesc->entry = intf->beacon;
|
|
|
|
/*
|
|
* Write TX descriptor into reserved room in front of the beacon.
|
|
*/
|
|
rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
|
|
|
|
/*
|
|
* Send beacon to hardware.
|
|
* Also enable beacon generation, which might have been disabled
|
|
* by the driver during the config_beacon() callback function.
|
|
*/
|
|
rt2x00dev->ops->lib->write_beacon(intf->beacon);
|
|
rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
|
|
|
|
mutex_unlock(&intf->beacon_skb_mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
|
|
const enum data_queue_qid queue)
|
|
{
|
|
int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
|
|
|
|
if (queue == QID_RX)
|
|
return rt2x00dev->rx;
|
|
|
|
if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
|
|
return &rt2x00dev->tx[queue];
|
|
|
|
if (!rt2x00dev->bcn)
|
|
return NULL;
|
|
|
|
if (queue == QID_BEACON)
|
|
return &rt2x00dev->bcn[0];
|
|
else if (queue == QID_ATIM && atim)
|
|
return &rt2x00dev->bcn[1];
|
|
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
|
|
|
|
struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
|
|
enum queue_index index)
|
|
{
|
|
struct queue_entry *entry;
|
|
unsigned long irqflags;
|
|
|
|
if (unlikely(index >= Q_INDEX_MAX)) {
|
|
ERROR(queue->rt2x00dev,
|
|
"Entry requested from invalid index type (%d)\n", index);
|
|
return NULL;
|
|
}
|
|
|
|
spin_lock_irqsave(&queue->lock, irqflags);
|
|
|
|
entry = &queue->entries[queue->index[index]];
|
|
|
|
spin_unlock_irqrestore(&queue->lock, irqflags);
|
|
|
|
return entry;
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
|
|
|
|
void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
|
|
{
|
|
unsigned long irqflags;
|
|
|
|
if (unlikely(index >= Q_INDEX_MAX)) {
|
|
ERROR(queue->rt2x00dev,
|
|
"Index change on invalid index type (%d)\n", index);
|
|
return;
|
|
}
|
|
|
|
spin_lock_irqsave(&queue->lock, irqflags);
|
|
|
|
queue->index[index]++;
|
|
if (queue->index[index] >= queue->limit)
|
|
queue->index[index] = 0;
|
|
|
|
if (index == Q_INDEX) {
|
|
queue->length++;
|
|
} else if (index == Q_INDEX_DONE) {
|
|
queue->length--;
|
|
queue->count++;
|
|
}
|
|
|
|
spin_unlock_irqrestore(&queue->lock, irqflags);
|
|
}
|
|
|
|
static void rt2x00queue_reset(struct data_queue *queue)
|
|
{
|
|
unsigned long irqflags;
|
|
|
|
spin_lock_irqsave(&queue->lock, irqflags);
|
|
|
|
queue->count = 0;
|
|
queue->length = 0;
|
|
memset(queue->index, 0, sizeof(queue->index));
|
|
|
|
spin_unlock_irqrestore(&queue->lock, irqflags);
|
|
}
|
|
|
|
void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
struct data_queue *queue;
|
|
|
|
txall_queue_for_each(rt2x00dev, queue)
|
|
rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
|
|
}
|
|
|
|
void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
struct data_queue *queue;
|
|
unsigned int i;
|
|
|
|
queue_for_each(rt2x00dev, queue) {
|
|
rt2x00queue_reset(queue);
|
|
|
|
for (i = 0; i < queue->limit; i++) {
|
|
queue->entries[i].flags = 0;
|
|
|
|
rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int rt2x00queue_alloc_entries(struct data_queue *queue,
|
|
const struct data_queue_desc *qdesc)
|
|
{
|
|
struct queue_entry *entries;
|
|
unsigned int entry_size;
|
|
unsigned int i;
|
|
|
|
rt2x00queue_reset(queue);
|
|
|
|
queue->limit = qdesc->entry_num;
|
|
queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
|
|
queue->data_size = qdesc->data_size;
|
|
queue->desc_size = qdesc->desc_size;
|
|
|
|
/*
|
|
* Allocate all queue entries.
|
|
*/
|
|
entry_size = sizeof(*entries) + qdesc->priv_size;
|
|
entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
|
|
if (!entries)
|
|
return -ENOMEM;
|
|
|
|
#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
|
|
( ((char *)(__base)) + ((__limit) * (__esize)) + \
|
|
((__index) * (__psize)) )
|
|
|
|
for (i = 0; i < queue->limit; i++) {
|
|
entries[i].flags = 0;
|
|
entries[i].queue = queue;
|
|
entries[i].skb = NULL;
|
|
entries[i].entry_idx = i;
|
|
entries[i].priv_data =
|
|
QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
|
|
sizeof(*entries), qdesc->priv_size);
|
|
}
|
|
|
|
#undef QUEUE_ENTRY_PRIV_OFFSET
|
|
|
|
queue->entries = entries;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
|
|
struct data_queue *queue)
|
|
{
|
|
unsigned int i;
|
|
|
|
if (!queue->entries)
|
|
return;
|
|
|
|
for (i = 0; i < queue->limit; i++) {
|
|
if (queue->entries[i].skb)
|
|
rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
|
|
}
|
|
}
|
|
|
|
static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
|
|
struct data_queue *queue)
|
|
{
|
|
unsigned int i;
|
|
struct sk_buff *skb;
|
|
|
|
for (i = 0; i < queue->limit; i++) {
|
|
skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
|
|
if (!skb)
|
|
return -ENOMEM;
|
|
queue->entries[i].skb = skb;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
struct data_queue *queue;
|
|
int status;
|
|
|
|
status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
|
|
if (status)
|
|
goto exit;
|
|
|
|
tx_queue_for_each(rt2x00dev, queue) {
|
|
status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
|
|
if (status)
|
|
goto exit;
|
|
}
|
|
|
|
status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
|
|
if (status)
|
|
goto exit;
|
|
|
|
if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
|
|
status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
|
|
rt2x00dev->ops->atim);
|
|
if (status)
|
|
goto exit;
|
|
}
|
|
|
|
status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
|
|
if (status)
|
|
goto exit;
|
|
|
|
return 0;
|
|
|
|
exit:
|
|
ERROR(rt2x00dev, "Queue entries allocation failed.\n");
|
|
|
|
rt2x00queue_uninitialize(rt2x00dev);
|
|
|
|
return status;
|
|
}
|
|
|
|
void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
struct data_queue *queue;
|
|
|
|
rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
|
|
|
|
queue_for_each(rt2x00dev, queue) {
|
|
kfree(queue->entries);
|
|
queue->entries = NULL;
|
|
}
|
|
}
|
|
|
|
static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
|
|
struct data_queue *queue, enum data_queue_qid qid)
|
|
{
|
|
spin_lock_init(&queue->lock);
|
|
|
|
queue->rt2x00dev = rt2x00dev;
|
|
queue->qid = qid;
|
|
queue->txop = 0;
|
|
queue->aifs = 2;
|
|
queue->cw_min = 5;
|
|
queue->cw_max = 10;
|
|
}
|
|
|
|
int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
struct data_queue *queue;
|
|
enum data_queue_qid qid;
|
|
unsigned int req_atim =
|
|
!!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
|
|
|
|
/*
|
|
* We need the following queues:
|
|
* RX: 1
|
|
* TX: ops->tx_queues
|
|
* Beacon: 1
|
|
* Atim: 1 (if required)
|
|
*/
|
|
rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
|
|
|
|
queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
|
|
if (!queue) {
|
|
ERROR(rt2x00dev, "Queue allocation failed.\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/*
|
|
* Initialize pointers
|
|
*/
|
|
rt2x00dev->rx = queue;
|
|
rt2x00dev->tx = &queue[1];
|
|
rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
|
|
|
|
/*
|
|
* Initialize queue parameters.
|
|
* RX: qid = QID_RX
|
|
* TX: qid = QID_AC_BE + index
|
|
* TX: cw_min: 2^5 = 32.
|
|
* TX: cw_max: 2^10 = 1024.
|
|
* BCN: qid = QID_BEACON
|
|
* ATIM: qid = QID_ATIM
|
|
*/
|
|
rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
|
|
|
|
qid = QID_AC_BE;
|
|
tx_queue_for_each(rt2x00dev, queue)
|
|
rt2x00queue_init(rt2x00dev, queue, qid++);
|
|
|
|
rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
|
|
if (req_atim)
|
|
rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
|
|
{
|
|
kfree(rt2x00dev->rx);
|
|
rt2x00dev->rx = NULL;
|
|
rt2x00dev->tx = NULL;
|
|
rt2x00dev->bcn = NULL;
|
|
}
|