9de98fb4ec
All SoCs provide an area of device configuration registers called the DSCR. The location of specific registers as well as their use varies considerably from implementation to implementation. Rather than having to rely on additional SoC-specific DSCR code for each new supported SoC, this code generalize things as much as possible using device tree properties. Initialization must take place early on (setup_arch time) in case the event timer device needs to be enable via the DSCR. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
34 lines
909 B
C
34 lines
909 B
C
/*
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* Copyright (C) 2011 Texas Instruments Incorporated
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* Author: Mark Salter <msalter@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef _ASM_C6X_DSCR_H
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#define _ASM_C6X_DSCR_H
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enum dscr_devstate_t {
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DSCR_DEVSTATE_ENABLED,
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DSCR_DEVSTATE_DISABLED,
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};
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/*
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* Set the device state of the device with the given ID.
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*
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* Individual drivers should use this to enable or disable the
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* hardware device. The devid used to identify the device being
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* controlled should be a property in the device's tree node.
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*/
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extern void dscr_set_devstate(int devid, enum dscr_devstate_t state);
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/*
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* Assert or de-assert an RMII reset.
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*/
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extern void dscr_rmii_reset(int id, int assert);
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extern void dscr_probe(void);
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#endif /* _ASM_C6X_DSCR_H */
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