7c289385b8
The AACI TRM requires the MAINCR enable bit to be held zero for two bitclk cycles plus three apb_pclk cycles. Use a delay of 1us to ensure this. Ensure that writes to MAINCR to change the addressed codec only happen when required, and that they take effect in a similar manner to the above, otherwise we seem to occasionally have stuck slot busy bits. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| aaci.c | ||
| aaci.h | ||
| Kconfig | ||
| Makefile | ||
| pxa2xx-ac97-lib.c | ||
| pxa2xx-ac97.c | ||
| pxa2xx-pcm-lib.c | ||
| pxa2xx-pcm.c | ||
| pxa2xx-pcm.h | ||