kernel-fxtec-pro1x/arch/riscv
Alexandre Ghiti dc04a00b3c riscv: Adjust mmap base address at a third of task size
[ Upstream commit ae662eec8a515ab550524e04c793b5ddf1aae3a1 ]

This ratio is the most used among all other architectures and make
icache_hygiene libhugetlbfs test pass: this test mmap lots of
hugepages whose addresses, without this patch, reach the end of
the process user address space.

Signed-off-by: Alexandre Ghiti <aghiti@upmem.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-03-13 14:02:28 -07:00
..
configs irqchip: add a SiFive PLIC driver 2018-08-13 08:31:32 -07:00
include riscv: Adjust mmap base address at a third of task size 2019-03-13 14:02:28 -07:00
kernel riscv: fixup max_low_pfn with PFN_DOWN. 2019-03-13 14:02:27 -07:00
lib RISC-V: implement __lshrti3. 2018-08-13 08:31:30 -07:00
mm riscv: fixup max_low_pfn with PFN_DOWN. 2019-03-13 14:02:27 -07:00
Kconfig kconfig: include kernel/Kconfig.preempt from init/Kconfig 2018-08-02 08:06:54 +09:00
Kconfig.debug Kconfig: consolidate the "Kernel hacking" menu 2018-08-02 08:06:48 +09:00
Makefile riscv: add missing vdso_install target 2018-12-01 09:37:33 +01:00