kernel-fxtec-pro1x/virt/kvm/arm
Andre Przywara 6d52f35af1 arm64: KVM: add SGI generation register emulation
While the generation of a (virtual) inter-processor interrupt (SGI)
on a GICv2 works by writing to a MMIO register, GICv3 uses the system
register ICC_SGI1R_EL1 to trigger them.
Add a trap handler function that calls the new SGI register handler
in the GICv3 code. As ICC_SRE_EL1.SRE at this point is still always 0,
this will not trap yet, but will only be used later when all the data
structures have been initialized properly.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-20 18:25:32 +01:00
..
arch_timer.c arm/arm64: KVM: Require in-kernel vgic for the arch timers 2014-12-15 11:50:42 +01:00
vgic-v2-emul.c arm/arm64: KVM: split GICv2 specific emulation code from vgic.c 2015-01-20 18:25:30 +01:00
vgic-v2.c arm/arm64: KVM: make the maximum number of vCPUs a per-VM value 2015-01-20 18:25:28 +01:00
vgic-v3-emul.c arm64: KVM: add SGI generation register emulation 2015-01-20 18:25:32 +01:00
vgic-v3.c arm/arm64: KVM: make the value of ICC_SRE_EL1 a per-VM variable 2015-01-20 18:25:28 +01:00
vgic.c arm/arm64: KVM: add virtual GICv3 distributor emulation 2015-01-20 18:25:31 +01:00
vgic.h arm/arm64: KVM: add virtual GICv3 distributor emulation 2015-01-20 18:25:31 +01:00